- A. Teman and R. Giterman, "Gain cell embedded DRAM in fully depleted silicon-on-insulator technology", April 2022, US Patent 11,309,008
- A. Teman, A. Fish, R. Giterman and A. Shalom, "Embedded Dynamic Memory in FinFET Technology", September 2021, US Patent 11,127,455
- R. Giterman, L. Atias, A. Fish, A. Teman, "Complementary dual modular redundancy memory cell", April 2021, US Patent 10,991,421
- R. Giterman, Y. Weizman, and A. Teman, "Dynamic memory physical unclonable function", October 2020, US Patent 10,811,073
- A. Teman and T. Noy, "Refresh Controller for first-in first-out memories", October 2020, US Patent 10,803,920
- T. Noy and A. Teman, "Embedded DRAM based FIFOs", 2020. US Patent US20200168270A1
- R. Giterman and A. Teman, "Gain cell embedded dram in fully depleted silicon-on-insulator technology", 2020. WO2020012470A8
- E. Mentovich, N. Geuli, R. Giterman, A. Fish and A. Teman, "High density memory macro", 2019. US Patent App. 10,497,410 B2
- O. Maltabashi, Y. Kra, and A. Teman, "Physically-aware affinity-driven multiplier implementation," 2018. US Provisional App. 62/775909
- R. Giterman, A. Teman, P. Meinerzhagen, A. Burg, and A. Fish, “Transistor gain cell with feedback,” .June 2018. US Patent 10,002,660
- R. Giterman, A. Teman, P. Meinerzhagen, A. Burg, and A. Fish, “Transistor gain cell with feedback,” June 27 2017. US Patent 9,691,445. EP 3138101. IL 248633
- A. Teman, L. Pergament, O. Cohen, and A. Fish, “Ultra low power memory cell with a supply feedback loop configured for minimal leakage operation,” July 8 2014. US Patent US 8,773,895
- A. Teman, L. Pergament, O. Cohen, and A. Fish, “Ultra low power SRAM cell circuit with a supply feedback loop for near and sub threshold operation,” Sep. 2013. US Patent US 8,531,873. WO 2012153257 A2