O. Bass and J. Shor, "Miniaturized digital temperature sensor", 7 September 2021. US Patent 11,112,816
L. Lisha and J. Shor, “Process monitor circuitry with measurement capability”, 7 September 2021. US Patent 11,114,352
J. Shor, Y. Weizman and Y. Shifman, "Detecting Unreliable Bits In Transistor Circuitry", 4 May 2021. US Patent 10,999,083
J. Shor and N. Vinshtok-Melnik, "Ring Oscillator Temperature Sensor", 4 May 2021. US Patent 10,998,889
A. Mordakhay and J. Shor, "Miniaturized Thermistor Based Thermal Sensor", 22 December 2020. US Patent 10,871,404
Y. Shifman, A. Miller, J. Shor, "Two bit/cell SRAM PUF with enhanced reliability", 24 November 2020. US Patent 10,848,327
J. Shor, R. Levi and Y. Weizman, "Physical unclonable functions related to inverter trip points", 21 April 2020. US Patent 10,630,493
K. Luria, A. Lyakhov, J. Shor and M. Zelikson, "Low dropout voltage regulator integrated with digital power gate driver", 18 December 2018. US Patent 10,156,859
J. Shor, "Switch capacitor in bandgap voltage reference (BGREF)", 28 August 2018. US Patent 10,061,336
J. Shor, "Apparatus and method for selectively disabling one or more analog circuits of a processor during a low power state of the processor", 12 June 2018. US Patent 9,996,143
J. Shor, G. Geannopoulos, F. Paillet, L. Vu, and O. Dadashev, "Bandgap reference circuit with low output impedance stage and power-on detector", 20 March 2018. US Patent 9,921,592
N. Familia, A. Saksonov, E. Fayneh, J. Shor, "Digital phase-locked loop supply voltage control", 9 January 2018. US Patent 9,866,225
J.Shor, "Accurate power-on detector", 2 May 2017. US Patent 9,639,133
N. Familia, A. Saksonov, E. Fayneh, J. Shor, "Digital phase-locked loop supply voltage control", 24 May 2016. US Patent 9,350,365
J. Shor, "Apparatus and method for selectively disabling one or more analog circuits of a processor during a low power state of the processor", 3 May 2016. US Patent 9,329,668
F. Paillet, J. Shor, G. L. Geannopoulos and H. Y. Tan, "Linear voltage regulator based on-die grid", 15 December 2015. US Patent 9,213,382
K. Luria and J. Shor, "Ratio meter for temperature sensor", 20 March 2012. US Patent 8,136,987
J. Shor, A. Zaidel, N. Familia, "Low noise voltage regulator", 5 July 2011. US Patent 7,973,518
J. Shor, "Power supply circuit for a phase-locked loop", 1 June 2010. US Patent 7,728,688
J. Shor and E. Fayneh, "Voltage regulator", 21 July 2009. US Patent 7,564,299
K. Luria and J. Shor, "Analog thermal sensor array", 23 June 2009. US Patent 7,549,795
J. Tschanz,V. Zia, V. De , J. Shor, "Bidirectional body bias regulation", 15 July 2008. US Patent 7,400,186
J. Shor, "Buffered cascode current mirror", 26 February 2008. US Patent 7,336,133
J. Shor, E. Maayan and Y. Betser, "MOS capacitor with reduced parasitic capacitance", 14 August 2007. US Patent 7,256,438
J. Shor, Y Betser and Y. Sofer, "Power-up and BGREF circuitry", 13 March 2007. US Patent 7,190,212
J. Shor and E. Maayan, "Charge pump element with body effect cancellation for early charge pump stages", 12 December 2006. US Patent 7,148,739
J. Shor and Y. Betser, "Class AB voltage regulator", 26 July 2005. US Patent 6,922,099
J. Shor and Y. Polansky, "Fast discharge for program and verification", 14 June 2005. US Patent 6,906,966
J. Shor, "Operational amplifier with fast rise time", 26 April 2005. US Patent 6,885,244
J. Shor, E. Maayan and Y. Polansky, "Charge pump stage with body effect minimization", 8 March 2005. US Patent 6,864,739
J. Shor, A. Harush and S. Eisen, "Method and circuit for operating a memory cell using a single charge pump", 11 January 2005. US Patent 6,842,383
J. Shor and E. Maayan, "Stack element circuit", 14 September 2004. US Patent 6,791,396
J. Shor and E. Maayan, "Charge pump stage with body effect minimization", 13 January 2004. US Patent 6,677,805
J. Shor, Y. Sofer and E. Maayan, "Charge pump with constant boosted output voltage", 10 June 2003. US Patent 6,577,514
J. Shor, Y. Sofer and E. Maayan, "Voltage regulator for non-volatile memory with large power supply rejection ration and minimal current drain", 10 September 2002. US Patent 6,448,750
J. Shor, V. Koifman and Y. Afek, "Circuit arrangement to compensate non-linearities in a resistor, and method", 26 December 2000. US Patent 6,166,578
J. Shor, A.D. Kurtz and D. Goldstein, "Method for etching of silicon carbide semiconductor using selective etching of different conductivity types", 7 March 2000. US Patent 6,034,001
J. Shor, M. Yosefin and D. Bruck, "Circuit with hot-electron protection and method", 5 October 1999. US Patent 5,963,076
M. Yosefin, Y. Afek and J. Shor, "Circuit with hot electron protection and method", 14 September 1999. US Patent 5,952,875
J. Shor, E. Engel and N. Baron, "Apparatus and method for shifting signal levels", 12 May 1998. US Patent 5,751,178
A.D. Kurtz, J. Shor and A. Ned, "Method for forming isolated CMOS structures on SOI structures", 28 January 1997. US Patent 5,597,738
J. Shor and A.D. Kurtz, "Porous silicon carbide (SIC) semiconductor device", 29 October 1996. US Patent 5,569,932
A.D. Kurtz, J. Shor and A. Ned, "Method for making semiconductor structures having environmentally isolated elements", 24 October 1995. US Patent 5,461,001
J. Shor and A.D. Kurtz, "Method of fabricating porous silicon carbide (SiC)", 3 October 1995. US Patent 5,454,915
A.D. Kurtz, J. Shor and A. Ned, "Semiconductor structures having environmentally isolated elements and method for making the same", 31 January 1995. US Patent 5,386,142
J. Shor and A.D. Kurtz, "Fabricating porous silicon carbide", 27 December 1994. US Patent 5,376,241
A.D.Kurtz and J. Shor, "Pressure transducer utilizing diamond piezoresistive sensors and silicon carbide force collector", 19 April 1994. US Patent 5,303,594
J. Shor and A.D. Kurtz, "Porous silicon carbide (SiC) semiconductor device", 29 March 1994. US Patent 5,298,767
A.D. Kurtz, D. Goldstein and J. Shor, "High temperature transducers and methods of fabricating the same employing silicon carbide", 24 November 1992. US Patent 5,165,283