Conference papers
2018-2021
- I. Stanger, N. Shavit, R. Taco, M. Lanuzza, A. Fish, “Live Demo: Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths”, 2021 IEEE International Symposium on Circuits and Systems (ISCAS), hybrid
- N. Shavit, I. Stanger, R. Taco, M. Lanuzza, A. Fish, “Live Demonstration: A 0.8V, 1.54 pJ / 940 MHz Dual Mode Logic-based 16x16-bit Booth Multiplier in 16-nm FinFET”, 2021 IEEE International Symposium on Circuits and Systems (ISCAS), hybrid
- I. Stanger, N. Shavit, R. Taco, M. Lanuzza and A. Fish, "Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths" ISICAS- IEEE Symposium on Integrated Circuits and Systems 2020, Shanghai, China, 2020
- M. Assaf, O. Harel, E. Tadmor, O. Yadid Pecht and A. Fish, "Weight Based Current Assisted Photonic Demodulator (WBCAPD) - Expansion Towards Neuromorphic Applications" 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020
- R. Taco, L. Yavits, N. Shavit, I. Stanger, M. Lanuzza, A. Fish, "Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic –Based Digital Circuits in 28nm FD-SOI Technology" 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020
- L. Yavits, R. Taco, N. Shavit, I. Stanger and A. Fish, "Dual Mode Logic Address Decoder" 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020
- I. Stanger, N. Shavit, R. Taco, L. Yavits, M. Lanuzza and A. Fish, "Robust Dual Mode Pass Logic (DMPL) for Energy Efficiency and High Performance" 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020
- D. Zooker, M. Elkoni, O. Ohev Shalom, Y. Weizman, I. Levi, O. Keren and A. Fish, "Temporal Power Redistribution as a Countermeasure Against Side-Channel Attacks" 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020
- R. Giterman, M. Wicentowski, O. Chertkow, I. Sever, I. Kehati, Y. Weizman, O. Keren and A. Fish, "Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications," ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), Cracow, Poland, 2019, pp. 69-72
- D. Zooker, A. Fish, O. Keren and Y. Weizman, "Compact Sub-Vt Optical Sensor for the Detection of Fault Injection in Hardware Security Applications," 2019 10th IFIP International Conference on New Technologies, Mobility and Security (NTMS), pp. 1-5, CANARY ISLANDS, Spain, 2019
- D. Zooker, A. Fish, O. Keren, "DPMUX Based LUT Towards Secure FPGA", TRUDEVICE Workshop, Baden Baden, Germany 2019.
- I. Kehati, M. Vicentowski, R. Giterman, Y. Weizman, A. Fish, O. Keren, "Demonstration of dynamic write cycle power analysis attacks against SRAM implementations", TRUDEVICE Workshop 2019, Baden Baden, Germany 2019.
- R. Taco, I. Levi, M. Lanuzza and A. Fish, "Live Demo: An 88fJ / 40 MHz [0.4V] – 0.61pJ / 1GHz [0.9V] Dual Mode Logic 8×8-Bit Multiplier Accumulator with a Self-Adjustment Mechanism in 28 nm FD-SOI," 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-1.
- Y. Shifman, A. Miller, Y. Weizman, A. Fish and Joseph Shor, “An SRAM PUF with 2 Independent Bits/Cell in 65nm”, 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5.
- Y. Rudin, I. Levi, A. Fish and O. Keren, "FPGA Implementation of pAsynch Design Paradigm," 2019 10th IFIP International Conference on New Technologies, Mobility and Security (NTMS), CANARY ISLANDS, Spain, 2019, pp. 1-5.
- D. Zooker, A. Fish, O. Keren and Y. Weizman, "Compact Sub-Vt Optical Sensor for the Detection of Fault Injection in Hardware Security Applications," 2019 10th IFIP International Conference on New Technologies, Mobility and Security (NTMS), CANARY ISLANDS, Spain, 2019, pp. 1-5.
- A. Shalom, A. Fish and A. Teman, "A 9pW/bit 440mV 3T Gain-Cell eDRAM for ULP Applications in 28nm FD-SOI" in Proc. of IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), October 2019
- R. Giterman, A. Teman and A. Fish, "A 14.3 pW Sub-Threshold 2T Gain-Cell eDRAM for Ultra-Low Power IoT Applications in 28nm FD-SOI." 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). IEEE, 2018.
- R Giterman, O. Keren and A. Fish, "Improving the Security of a 6T SRAM using Body-Biasing in 28 nm FD-SOI." 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). IEEE, 2018.
- N. Shavit, R. Taco and A. Fish, "Efficiency of Dual Mode Logic in Nanoscale Technology Nodes," 2018 IEEE International Conference on the Science of Electrical Engineering in Israel (ICSEE), Eilat, Israel, 2018, pp. 1-4.
- N. Shavit, I. Stanger, R. Taco and A. Fish, "Process Variation-Aware Data path Employing Dual Mode Logic," 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Burlingame, CA, USA, 2018, pp. 1-3.
- M. Avital, A. Fish, A. Mordakhay, D. Zooker, Y. Weizman and O. Keren, "Utilization of Process and Supply Voltage Random Variations for Random Bit Generation", 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Chengdu, China, October 2018.
- M. Avital, I. Levi, Y. Rudin, A. Fish and O. Keren, "Embedded Randomness and Data Dependencies Design Paradigm: Advantages and Challenges", accepted for presentation at DATE conference, Dresden, Germany, March, 2018.
2017-2015
- U. Zangi, N. Feldman, J. Shor and A. Fish, “0.45v and 18μA/MHz MCU SOC with Advanced Adaptive Dynamic Voltage Control (ADVC)”, Proc. IEEE S3S conference, San Francisco, USA, October 2017 (Best Paper Finalist).
- R. Giterman, A. Teman and A. Fish, “A 11.5pW/bit 400mV 5T Gain-Cell eDRAM for ULP Applications in 28nm FD-SOI”, Proc. IEEE S3S conference, San Francisco, USA, October 2017.
- R. Taco, I. Levi, M. Lanuzza and A. Fish, “Energy-Delay Tradeoffs of Low-Voltage Dual Mode Logic in 28nm FD-SOI”, Proc. IEEE S3S conference, San Francisco, USA, October 2017.
- D. Zooker, I. Levi, A Fish and O. Keren, “Secured Dual-Rail-Precharge Mux-Based (DPMUX) Symmetric-Logic for Low Voltage Applications”, Proc. IEEE S3S conference, San Francisco, USA, October 2017.
- M. Haber, I. Levi and A. Fish, “Differential Input Output CMOS (DINO-CMOS) –High performance and Energy Efficient Logic Family”, Proc. IEEE S3S conference, San Francisco, USA, October 2017.
- Y. Shoshan, S. Yuzhaninov, N. Edri, S. Harai, Y. Rudin, Y. Weizman, I. Nadler, N. Rosenberg, B. Flom, D. Bechor, G. Morag, E. Grigoriants, N. Blum, R. Daly, M. Reuveni and A. Fish, “A SoC Platform for Emerging Technologies”, Proc. IEEE ISOSOC conference, Seoul, South Korea, October 2017.
- R. Giterman, A. Fish, N. Geuli, E. Mentovich, A. Burg and A. Teman, “An 800 Mhz Mixed-VT 4T Gain-Cell Embedded DRAM in 28nm CMOS Bulk Process for Approximate Computing Applications”, Proc IEEE ESSCIRC conference, Belgium, September 2017.
- D. Zooker, M. Vizentovski, Y. Weizman, A. Fish and O. Keren, “Vulnerability of Secured IoT Memory Against Localized Back Side Laser Fault Injection”, Seventh IEEE International Conference on Emerging Security Technologies, UK, September 2017.
- I. Levi, A. Fish and O. Keren, “Security Aware Pseudo-Asynchronous Circuit Design Style “, 2nd IEEE International Verification and Security Workshop, Greece, July 2017.
- R. Taco, I. Levi, M. Lanuzza and A. Fish, "Evaluation of Dual Mode Logic in 28nm FD-SOI Technology, accepted for oral presentation at IEEE ISCAS 2017.
- O. Bass, R. Giterman, A. Fish and D. Naveh, “Tranmistor-only Based Crossbar Memory Array with a Two Stage Readout Scheme”, Proc. MEMRYS conference, Greece, March 2017.
- O. Bass, R. Giterman, A. Fish and D. Naveh, "A Device-Level Approach to Resolving the Sneak Currents of Crossbar Arrays", accepted for presentation at International Conference on Memristive Materials, Devices & Systems (MEMRISYS 2017), Greece, April 2017.
- M. Avital, A. Fish and O. Keren, "From Full-Custom to Fully-Standard Cell Power Analysis Countermeasures", Truedevice workshop, Barcelona, November 2016.
- R. Giterman, A. Teman, P. Meinerzhagen, A. Fish, and A. Burg, "A Process Compensated Gain Cell Embedded-DRAM for Ultra-Low-Power Variation-Aware Design", accepted to IEEE ISCAS, Montreal, Canada, May 2016.
- R. Taco, I. Levi, M. Lanuzza and A. Fish, "Extended Exploration of Low Granularity Back Biasing Control in 28nm UTBB FD-SOI Technology", accepted to IEEE ISCAS, Montreal, Canada, May 2016.
- R. Taco, I. Levi, M. Lanuzza and A. Fish, "Low voltage Ripple Carry Adder with low-Granularity Dynamic Forward Back-Biasing in 28 nm UTBB FD-SOI", Proc. IEEE S3S conference, San Francisco, USA, October 2015.
- R. Giterman, A. Teman and A. Fish, " A Soft Error Tolerant 4T Gain-Cell Featuring a Parity Column for Ultra-Low Power Applications", Proc. IEEE S3S conference, San Francisco, USA, October 2015.
- E. Tadmor, A. Nevet, G. Yahav, A. Fish and D. Cohen, "A Fast Gated CMOS Image Sensor with a Vertical Overflow Drain Shutter Mechanism", 2015 International Image Sensor Workshop, Vaals, Netherlands. June, 2015.
- M. Haber, B. Frankel, M. Avital, I. Levi, O. Keren and A. Fish, "Insights into the Correlation between the Processed Data and its Power Traces", Truedevice, France, Date 2016.
2014-2013
- R. Giterman and A. Fish, "Towards a Black-Box Methodology for SRAM Stability Analysis", Proc. IEEEI 2014 conference, pp. 1-4, Eilat, Israel, December 2014.
- R. Taco, I. Levi, A. Fish and M. Lanuzza, "Exploring Back Biasing Opportunities in 28nm UTBB FD-SOI Technology for Subthreshold Digital Design", Proc. IEEEI 2014 conference, PP. 1-4, Eilat, Israel, December 2014.
- L. Atias, A. Teman and A. Fish, "Low Power Radiation Hardened SRAM - Challenges and Leading Solutions, Proc. IEEEI 2014 conference, PP. 1-4, Eilat, Israel, December 2014.
- A. Pescovsky, O. Chertkow, L. Atias and A. Fish, “SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD)”, Proc. IEEE S3S conference, PP. 1-3, Millbrae, USA, October 2014 (Best student paper award).
- R. Giterman, A. Teman, P. Meinerzhagen, A. Burg and A. Fish, “4T Gain-Cell with Internal-Feedback for Ultra-Low Retention Power at Scaled CMOS Nodes”, Proc. IEEE ISCAS conference, pp. 2177-2180, Melbourne, Australia, June 2014.
- M. Avital and A. Fish, “Secured Dual Mode Logic (DML) as a Countermeasure Against Differential Power Analysis”, Proc. IEEE ISCAS 2014 conference, pp. 810-813, Melbourne, Australia, June 2014.
- A. Mordakhay and A. Fish, “Analog Readout Circuit for Zero Leakage Planar-Hall-Effect-Magnetic-Random-Access-Memory”, Proc. IEEE FTFC 2014 conference, pp. 1-4, Monaco, May 2014.
- R. Buzilo, B. Likhtrov, R. Giterman, I. Levi, A. Fish and A. Belenky, “Approach to Integrated Energy Harvesting Voltage Source Based on Novel Active TEG Array System”, Proc. IEEE FTFC 2014 conference, pp. 1-4, Monaco, May, 2014.
- L. Atias, A. Teman and A. Fish, “A 13T Radiation Hardened SRAM Bitcell for Low-Voltage Operation”, Proc. IEEE S3S conference, Monterey, USA, October 2013.
2012-2011
- A. Teman, P. Meinerzhagen, A. Burg and A. Fish, “Review and Classification of Gain Cell eDRAM Implementations”, Proc. IEEEI 2012 conference, pp. 1-5, Eilat, Israel, November 2012.
- N. Edri, S. Fraiman, A. Teman and A. Fish, “Data Retention Voltage Detection for Minimizing the Standby Power of SRAM Arrays”, Proc. IEEEI 2012 conference, pp. 1-5, Eilat, Israel, November 2012.
- P. Meinerzhagen, A. Teman, A. Mordakhay, A. Burg and A. Fish, “A Sub-VT 2T Gain-Cell Memory for Biomedical Applications”, Proc. IEEE 2012 Subthreshold Microelevctronics conference, pp. 1-3, Waltham, USA, October 2012.
- N. Krihely, S. Ben-Yaakov and A. Fish, “Optimization of a Multi- Target Voltages Switched Capacitor Converter”, Proc. International conference on Optimization of electrical and Electronic Equipment, pp. 759-763 , Brasov, Romania, May 2012.
- H. Dagan, A. Teman, E. Pikhay, V. Dayan, Y. Roizin and A. Fish, “A GIDL Free Tunneling Gate Driver for a Low Power Non-Volatile Memory Array”, Proc. IEEE International Symposium on Circuits and Systems conference, pp. 452-455, Seoul, Korea, May 2012.
- H. Dagan, A. Teman, E. Pikhay, V. Dayan, Y. Roizin and A. Fish, “A Low-Cost Low-Power Non-Volatile Memory for RFID Applications”, Proc. IEEE International Symposium on Circuits and Systems conference, pp. 1827-1830, Seoul, Korea ,May 2012.
- I. Levi, O. Bass, A. Kaizerman, A. Belenky and A. Fish, “High Speed Dual Mode Logic Carry Look Ahead Adder”, Proc. IEEE International Symposium on Circuits and Systems conference, pp. 3037-3040 ,Seoul, Korea, May 2012.
- J. Mezhibovsky, A. Teman, and A. Fish, “State Space Modeling for Sub-Threshold SRAM Stability Analysis”, Proc. IEEE International Symposium on Circuits and Systems conference, pp. 1823-1826, Seoul, Korea, May 2012.
- J. Mezhibovsky, A. Teman and A. Fish, “Low Voltage SRAMs and the Scalability of the 9T Supply Feedback SRAM”, Proc. IEEE SOCC conference, pp. 136-141, Taipei, China, September 2011.
- I. Schwartz, A. Teman, R. Dobkin and A. Fish, “Near-Threshold 40nm Supply Feedback C-Element”, Proc. of the 3rd Asia Symposium On Quality Electronic Design (ASQED), pp. 74-78, Kuala Lumpur, Malaysia, July 2011.
- S. Fisher, R. Dagan, S. Blonder and A. Fish, “An Improved Model for Delay/Energy Estimation in Near-Threshold Flip-Flops”, Proc. IEEE ISCAS 2011 conference, pp. 1065-1068, Rio de Janeiro ,Brazil, May 2011.
2010-2008
- A. Teman and A. Fish, “Sub-threshold and Near-threshold SRAM Design”, Proc. IEEEI 2010 conference, pp. 608-612, Eilat, Israel, November 2010.
- A. Morgenshtein, I. Shwartz and A. Fish, “Gate Diffusion Input (GDI) Logic in Standard CMOS Nanoscale Process”, Proc. IEEEI 2010 conference, pp. 777-780, Eilat, Israel, November 2010.
- D. Shurin, E. Kvaktun and A. Fish, “Input Vector Control Efficiency in Sub-Micron CMOS Technologies” Proc. IEEEI 2010 conference, pp. 569-573, Eilat, Israel, November 2010.
- A. Teman, O. Yadid-Pecht and A. Fish, "An Improved AB2C Scheme for Leakage Power Reduction in Image Sensors with On-Chip Memory", Proc. IEEE Sensors Conference, pp. 193-196, Christchurch, New Zealand, October 2009.
- S. Fisher, A. Teman, D. Vaysman, A. Gertsman, O. Yadid-Pecht and A. Fish, "Ultra-Low Power Subthreshold Flip Flop Design", Proc. ISCAS 2009, pp. 1573-1576, Taipei, China, May 2009.
- S. Fisher, A. Teman, D. Vaysman, A. Gertsman, O. Yadid-Pecht and A. Fish, "Digital Subthreshold Logic Design – Motivation and Challenges", Proc. IEEE 2008 conference, pp. 702-706, Eilat, Israel, December 2008.
- M. Beiderman, T. Tam, A. Fish, G. A. Jullien and O. Yadid-Pecht, “An advanced CMOS Imager Employing Modified AR and ACS methods”, Proc. IEEE Sensors conference, pp. 1386-1389, Lecce, Italy, October 2008.
- X. Li, Y. Shoshan, A. Fish, G. A. Jullien and O. Yadid-Pecht, "Hardware Implementation of a DCT Watermark for CMOS Image Sensors", Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 368-371, St. Julien's, USA, August 2008.
- X. Li, Y. Shoshan, A. Fish, and G. A. Jullien, "A Simplified Approach for Designing Secure Random Number Generators in HW", Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 372-375, St. Julien's, USA, September 2008.
- A. Teman, S. Fisher, L. Sudakov, A. Fish and O. Yadid-Pecht, "Autonomous CMOS Image Sensor for Real Time Targets Detection and Tracking", Proc. IEEE International Symposium on Circuits and Systems, pp. 2138-2141, Seattle, USA, May 2008.
- M. Beiderman, T. Tam, A. Fish, G. A. Jullien and O. Yadid-Pecht, “A Low Noise CMOS Image Sensor with an Emission Filter for Fluorescence Applications”, Proc. IEEE International Symposium on Circuits and Systems, pp. 1100-1103, Seattle, USA, May 2008.
- A. Fish and O. Yadid-Pecht, “Low Power “Smart” CMOS Image Sensors”, Proc. IEEE International Symposium on Circuits and Systems, pp. 1408-1411, Seattle, USA, May 2008.
2007-2005
- A. Fish, O. Yadid-Pecht and E. Culurciello, "Responsivity of Gated Photodiode in Silicon-on-Sapphire Technology", Proc. IEEE Sensors conference, pp. 527-530, Atlanta, USA, October 2007.
- A. Fish, T. Rothschild, A. Hodes, Y. Shoshan and O. Yadid-Pecht, “Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach”, Proc. IEEE International Symposium on Circuits and Systems, pp. 2834-2837, New-Orleans, USA, May 2007.
- A. Belenky, A. Fish and O. Yadid-Pecht, "Global Shutter CMOS Image Sensor with Wide Dynamic Range", Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 314–317, Nice, France, December 2006.
- A. Fish, S. Hamami and O. Yadid-Pecht, "Self-Powered Active Pixel Sensors for Ultra Low-Power Applications", Proc. IEEE International Symposium on Circuits and Systems, vol. 5, pp. 5310–5313, Kobe, Japan, May 2005. (Best Paper Finalist Award).
- A. Fish, E. Avner and O. Yadid-Pecht, "Low-Power Global/Rolling Shutter Image Sensors in Silicon on Sapphire Technology", Proc. IEEE International Symposium on Circuits and Systems, vol. 1, pp. 580-583, Kobe, Japan, May 2005.
2004
- A. Fish, V. Mosheyev, V. Linkovsky and O. Yadid-Pecht, "Ultra Low-Power DFF based Shift Registers Design for CMOS Image Sensors Applications", Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 658–661, Tel-Aviv, Israel, December 2004.
- A. Fish, A. Spivakovsky, A. Golberg and O. Yadid-Pecht, “VLSI Sensor for multiple targets detection and tracking”, Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 543–546, Tel-Aviv, Israel, December 2004. (Best Paper Finalist Award)
- A. Fish, V. Milrud and O. Yadid-Pecht, “High speed and high resolution current Loser-take-all circuit of o(N) complexity”, Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 234–237, Tel-Aviv, Israel, December 2004.
- A. Fish, A. Belenky and O. Yadid-Pecht, “Low Power Global Shutter CMOS Active Pixel Image Sensor with Ultra-High Dynamic Range”, Proc. IEEE International Conference on Electronics, Circuits and Systems, pp. 149–152, Tel-Aviv, Israel, December 2004.
- A. Fish, V. Milrud and O.Yadid-Pecht, “High speed and high resolution current winner-take-all circuit in conjunction with adaptive thresholding”, Proc. IEEE International Symposium on Circuits and Systems, vol. 4, pp. 852-855, Vancouver, Canada, May 2004.
- A. Belenky, A. Fish, S. Hamami, V. Milrud and O. Yadid-Pecht, “Widening the dynamic range of the readout integration circuit for uncooled micro-bolometer infrared sensors”, Proc. IEEE International Symposium on Circuits and Systems, vol. 5, pp. 600-603, Vancouver, Canada May, 2004.
- A. Morgenshtein, A. Fish and I. A. Wagner, “An efficient implementation of D-FLIP-FLOP using the GDI technique”, Proc. IEEE International Symposium on Circuits and Systems, vol. 2, pp. 673-676, Vancouver, Canada, May 2004.
2003-2002
- A. Fish, D. Akselrod and O. Yadid-Pecht, “An adaptive center of mass detection system employing a 2-D dynamic element matching algorithm for object tracking”, special session on Sensor Arrays for Visual Tracking and Navigation, Proc. IEEE International Symposium on Circuits and Systems, vol. 3, pp. 778-781, Bangkok, Thailand, May 2003.
- D. Askelrod, A. Fish and O. Yadid-Pecht, "A Mixed Signal Enhanced WTA Tracking System via 2D Dynamic Element Matching", Proc. IEEE International Symposium on Circuits and Systems, vol. 3, pp. 755-758, Arizona, USA, May 2002.
- A. Fish, D. Turchin and O. Yadid-Pecht, "An APS with 2D WTA Selection Employing Adaptive Spatial Filtering, Bad Pixel Elimination and False Alarm Reduction", Proc. IEEE International Symposium on Circuits and Systems, vol. 2, pp. 328-331, Arizona, USA, May 2002.
- A. Morgenshtein, A. Fish and I. A. Wagner, “Gate-diffusion input (GDI) – a technique for low power design of digital circuits: analysis and characterization”, Proc. IEEE International Symposium on Circuits and Systems, vol. 1, pp. 477-480, Arizona, USA, May 2002.
- A. Morgenshtein, A. Fish and I. A. Wagner, “Gate-Diffusion Input (GDI) – A Novel Power Efficient Method for Digital Circuits: A Detailed Methodology”, Proc. IEEE International ASIC/SOC Conference, pp. 39-43, Arlington, USA, September 2001.
- A. Fish and O. Yadid-Pecht “CMOS Current/Voltage Mode Winner-Take-All Circuit with Spatial Filtering”, Proc. IEEE International Symposium on Circuits and Systems, vol. 2, pp. 636-639, Sydney, Australia, May 2001.
- Invited papers/presentations
- Levi, O. Keren and A. Fish, “CPA Secured Data-Dependent Delay-Assignment Methodology”, to be presented at IEEE ISCAS, Baltimore, May 2017.
- Avital, I. Levi, O. Keren and A. Fish, "CMOS Based Gates for Blurring Power Information", to be presented at IEEE ISCAS, Baltimore, May 2017.
- R. Giterman, A. Teman, P. Meinerzhagen, L. Atias, A. Burg and A. Fish,
"Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications", TCAS special session on Energy Efficient Circuits & Systems, IEEE ISCAS, Montreal, Canada, May 2016. - I. Levi, O. Keren and A. Fish, "Data-Dependent Delays As a Barrier Against Power Attacks", IEEE ISCAS, Montreal, Canada, May 2016.
- L. Atias, A. Teman, R. Giterman, P. Meinerzhagen and A. Fish, "Low-Voltage Radiation-Hardened 13T SRAM bitcell for Ultra-Low Power Space Applications", IEEE ISCAS, Montreal, Canada, May 2016.
- M. Avital, H. Dagan, O. Keren and A. Fish, "Randomized Multi-Topology Logic Against Differential Power Analysis", IEEE ISCAS, Montreal, Canada, May 2016.
- M. Avital, H. Dagan, I. Levi, O. Keren and A. Fish, "DPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-Power Passive RFID Tags Employing S-Boxes", IEEE ISCAS, Montreal, Canada, May 2016.
- A. Belenky, E. Artyomov, A. Fish, O. Yadid-Pecht, “Wide dynamic range (WDR) imaging”, invited paper, The Neuromorphic Engineer, Vol. 1, Issue 1, p. 4., 2004.
- A. Fish, V. Milirud and O. Yadid-Pecht, “High-speed and high-precision current winner-take-all circuit", The Neuromorphic Engineer, Vol. 2, Issue 2, p. 6, 2005.
- Lectures and Presentations
- “Energy-Efficient Memories, invited talk, Green Photonics symposium, Technion, March 2016.
- “Alternative Logic Families for Energy-Efficient, Fast and Secured Chip Design”, invited talk, Green Photonics symposium, Berlin, March 2015.
- "Alternative Circuit Solutions", Intel Labs, Portland, October, 2014.
- “High performance, low power and secured IC components”, invited lecture, University of Freiburg, August 2014.
- “Alternative circuit level solutions for fast, energy- efficient and secured IC components”, invited lecture, UC Louvain, August 2014.
- "Energy Efficient Dual Mode Logic", invited lecture, UC Berkeley, October, 2012.
- “Energy Efficient Nanoscaled VLSI chips”, invited lecture, BGU energy initiative event.
- “Low voltage Logic and SRAM design”, invited lecture, IBM, October 2010.
- “Digital Low voltage Logic in the Era NaNoscale CMOS”, invited lecture, Tel Aviv University, March 2010.
- “Digital Subthreshold Logic Design in the Era NaNoscale CMOS”, Invited for Chip Design Conference, Tel Aviv, November 2009.
- "Digital Subthreshold Logic Design - Motivation and Challenges", invited lecture, Technion, December 2008.