{"id":14,"date":"2020-05-24T19:25:41","date_gmt":"2020-05-24T19:25:41","guid":{"rendered":"http:\/\/www.eng.biu.ac.il\/leviita2\/?page_id=14"},"modified":"2025-01-30T08:54:58","modified_gmt":"2025-01-30T08:54:58","slug":"publications","status":"publish","type":"page","link":"https:\/\/www.eng.biu.ac.il\/leviita2\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"\n

Journals<\/span><\/h3>\n\n\n
    \n
  1. Anandakumar, N. Nalla, et al. \"White Paper-Hardware Security Attack Landscape and Countermeasures.\"\u00a0Hardware Security Attack Landscape and Countermeasures<\/i>\u00a0(2024): 1-31.<\/li>\n
  2. D. Dobkin, N. Cever, and I. Levi<\/strong>. \"RAD-FS: Remote Timing and Power SCA Security in DVFS-augmented Ultra-Low-Power Embedded Systems.\" ACM Transactions on Embedded Computing Systems (2025).<\/li>\n
  3. Berti, I. Levi<\/strong>. \u201cProviding Integrity for Authenticated Encryption in the Presence of Joint Faults and Leakage\u201d. Cryptology ePrint Archive. 2024. (in evaluation).<\/li>\n
  4. Berti, F-X. Standaert, I. Levi<\/strong>. Authenticity in the Presence of Leakage using a Forkcipher. Cryptology ePrint Archive. 2024. (in evaluation).<\/li>\n
  5. D. Dobkin, E. Katz, D. Popovtzer, I. Levi<\/strong>. \u201cEMI Shielding for Use in Side-Channel Security: Analysis, Simulation and Measurements\u201d. Cryptology ePrint Archive. 2024.(in evaluation).<\/li>\n
  6. D. Dobkin, N. Cever and I. Levi,<\/strong> \u201cRAD-FS - Inherent and Embedded SCA-Security in Ultra-Low Power IoTs\u201d, IACR Cryptology ePrint report 2024\/186, https:\/\/eprint.iacr.org\/2024\/186<\/a>, Fab. 2024 (in evaluation).<\/li>\n
  7. E. Cohen, L. Yavits, B. M. Zaidel, A. Fish and I. Levi<\/strong> \u201cCoNfasTT: A Configurable, Scalable and Fast Dual Mode Logic-based NTT Design<\/a>\u201d IEEE Access<\/em> 2024 Sep 17.<\/li>\n
  8. Ganon and I. Levi<\/strong>, \"CrISA-X: Unleashing Performance Excellence in Lightweight Symmetric Cryptography for Extendable and Deeply Embedded Processors<\/a>.\" IACR Transactions on Cryptography Hardware and Embedded Systems<\/em>, T-CHES, 2024<\/li>\n
  9. Katz, I. Levi<\/strong>, \"Refined analytical EM model of IC-internal shielding for hardware-security and intra-device simulative framework<\/a>\". IEEE Access, DOI: 10.1109\/ACCESS.2024.3363184, Feb 2024.<\/li>\n
  10. Danieli E, Goldzweig M, Avital M, Levi I<\/strong>. \"Revealing the Secrets of Radio Embedded Systems: Extraction of Raw Information via RF<\/a>\". IEEE Transactions on Information Forensics and Security. 2023 Dec 20. (Final Extended version)<\/li>\n
  11. E. Katz, I. Levi<\/strong>, \u201cAn Accurate Analytical Side-Channel Electromagnetic (EM) Model and Inherent Integrated-Circuit (IC) Simulator\u201d. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, TCAD, Jun. 2023.<\/li>\n
  12. D. Salomon and I. Levi<\/strong>, \u201cMaskSIMD-lib: on the performance gap of a generic C optimized assembly and wide vector extensions for masked software with an Ascon-p test case\u201d. Journal of Cryptographic Engineering, JCEN. 2023 May 29:1-8. (Extended version).<\/li>\n
  13. E. Danieli, M. Goldzweig, M. Avital and I. Levi<\/strong>, \"Revealing the Secrets of Radio-Enabled
    Embedded Systems: on extraction of raw information from any on-board signal through RF\", IACR Cryptology ePrint report 2023\/XXX, Apr. 2023..<\/li>\n
  14. M. Avital and I. Levi<\/strong>, \"SCMA: Plaintext Classification Assisted Side Channel Spectral Modulation Attacks. Towards Noise-insensitive SCA Attacks...\", IACR Cryptology ePrint report 2023\/459, Mar. 2023.<\/li>\n
  15. I. Stanger, N. Shavit, R. Taco, M. Lanuzza, L. Yavits, I. Levi<\/strong> and A. Fish, \"FlexDML: High Utilization Configurable Multimode Arithmetic Units Featuring Dual Mode Logic\", in IEEE Solid-State Circuits Letters <\/em>(SSC-L<\/em>). <\/em>Mar 2023, To appear.<\/li>\n
  16. N. Shalom and I.Levi<\/strong>, \"Exploring Multi-Parameter Optimization of Automated High Level Synthesis (HLS) Tools and the Difficulty of Setting Complex Constraints\", in IEEE Latin America Symposium on Circuits and Systems, LASCAS<\/em>, Feb. 2023.<\/li>\n
  17. O. Gur, T. Gross, D. Bellizia, F. -X. Standaert and I. Levi<\/strong>, \"An In-Depth Evaluation of Externally Amplified Coupling (EAC) Attacks\u2014A Concrete Threat for Masked Cryptographic Implementations<\/a>,\" in\u00a0IEEE Transactions on Circuits and Systems I: Regular Papers<\/em>, 2022, doi: 10.1109\/TCSI.2022.3222176.<\/li>\n
  18. I. Levi<\/strong> and C. Hazay, \"Garbled-Circuits from an SCA Perspective: Free XOR can be Quite Expensive. . .<\/a>\", IACR Cryptology ePrint report 2022\/901.<\/li>\n
  19. R. Breuer, F.X. Standaert and I. Levi<\/strong>, \"Fully-Digital Randomization Based Side-Channel Security \u2014 Towards Ultra-Low Cost-per-Security<\/a>\", in IEEE Access<\/em>, vol. 10, pp. 68440-68449, 2022, doi: 10.1109\/ACCESS.2022.3185995.<\/li>\n
  20. I. Levi<\/strong>, D. Bellizia and F.X. Standaert, \"Tight-ES-TRNG - Improved Construction and Robustness Analysis<\/a>\", Journal of Computer Science, Springer-Nature<\/em>,\u00a0 DOI 10.1007\/s42979-022-01219-5.<\/li>\n
  21. D. Salomon and\u00a0I. Levi<\/strong>, \u201cOn the Performance Gap of a Generic C Optimized Assembler and Wide Vector Extensions for Masked Software with an Ascon-{\\it{p}} test case<\/a>\u201d, IACR Cryptology ePrint report 2022\/124.<\/li>\n
  22. N. Klein, E. Harel, and I. Levi<\/strong>, \u201cThe Cost of a True Random Bit\u2014On the Electronic Cost Gain of ASIC Time-Domain-Based TRNGs<\/a>\u201d, MDPI Journal of Cryptography<\/em> 2021<\/em>, 5(3), 25;\u00a0 18 Sep 2021<\/li>\n
  23. D. Salomon, A. Weiss, and I. Levi<\/strong>, \u201cImproved Filtering Techniques for Single- and Multi-Trace Side-Channel Analysis<\/a>\u201d, MDPI Journal of Cryptography 2021<\/em>, 5(3), 24; 13 Sep 2021<\/li>\n
  24. Y. Weizman, R. Giterman, O. Chertkow, M. Vizentovski, I. Levi<\/strong>, I. Sever, I. Kehati, O. Keren, and A. Fish,\u00a0 \"Low-Cost Side-Channel Secure Standard 6T SRAM Based Memory with a 1% Area and less than 5% Latency and Power Overheads<\/a>\" - IEEE Access<\/em>, vol. 9, pp. 91764-91776, 2021<\/li>\n
  25. R. Breuer and I. Levi<\/strong>, \"How Bad Are Bad Templates Optimistic Design Stage Side-Channel Security Evaluation and its Cost<\/a>\", Cryptography<\/i>\u00a04.4 (2020): 36<\/li>\n
  26. G. Cassiers, B. Gr\u00e9goire, I. Levi<\/strong>, and F.X. Standaert, \"Hardware Private Circuits: From Trivial Composition to Full Veri\ufb01cation,<\/a>\" IEEE Transactions on Computers<\/em>, doi: 10.1109\/TC.2020.3022979<\/li>\n
  27. I. Levi<\/strong>, D. Bellizia, D. Bol, and F-X. Standaert, \"Ask Less Get More: Side-Channel Signal Hiding, Revisited<\/a>\", IEEE Transactions of Circuits And Systems-I (TCAS-I): regular papers<\/em>, DOI: 10.1109\/TCSI.2020.3005338.<\/li>\n
  28. B. Bilgin, L. De Meyer, S. Duval, I. Levi<\/strong>,\u00a0 and F.X. Standaert, \"Low AND Depth and Efficient Inverses: a Guide on S-boxes for Low-latency Masking<\/a>\"<\/a>. IACR Transactions on Symmetric Cryptology<\/em>, pp. 144-184, 2020<\/li>\n
  29. I. Levi<\/strong>, D. Bellizia, and F. X. Standaert. \"Beyond Algorithmic Noise. Or How to Shuffle Parallel Implementations?<\/a>\", International Journal of Circuit Theory and Applications<\/em>, vol. 48, issue 5, pp. 674-695, May 2020<\/li>\n
  30. G. Cassiers, B. Gr\u00e9goire, I. Levi<\/strong>, and F.X. Standaert, \"Hardware Private Circuits: From Trivial Composition to Full Verification<\/a>\". cryptology eprint, 2020<\/li>\n
  31. J. Knechtel, E.B. Kavun, F. Regazzoni, A. Heuser, A. Chattopadhyay, D. Mukhopadhyay,\u00a0 S. Dey, Y. Fei, Y. Belenky, I. Levi<\/strong> and T. G\u00fcneysu, \"Towards secure composition of integrated circuits and electronic systems: On the role of EDA<\/a>\" . arXiv preprint arXiv:2001.09672, <\/i>2020.<\/li>\n
  32. K. Nawaz , L. Van Brandt, I. Levi<\/strong>, F. X. Standaert and D. Flandre, \"A security oriented transient-noise simulation methodology: Evaluation of intrinsic physical noise of cryptographic designs<\/a>\" in Integration, the VLSI Journal<\/em>, vol. 68, pp. 71-79, September 2019<\/li>\n
  33. D. Bellizia, F. Berti, O. Bronchain, G. Cassiers, S. Duval, C. Guo, G. Leander, G. Leurent, I. Levi<\/strong>, C. Momin and O. Pereira, \"Spook: Sponge-Based Leakage-Resilient Authenticated Encryption with a Masked Tweakable Block Cipher<\/a>\". Submission to NIST Lightweight Cryptography<\/em>, 2019<\/li>\n
  34. I. Levi<\/strong>, D. Bellizia and F. X. Standaert, \"Reducing a Masked Implementation\u2019s Effective Security Order with Setup Manipulations and an Explanation Based on Externally-Amplified Couplings<\/a>\" in IACR Transactions on Cryptographic Hardware and Embedded Systems, <\/em>pp. 293-317, no. 2, Feb. 2019<\/li>\n
  35. R. Taco, I. Levi<\/strong>, M. Lanuzza and A. Fish, \"An 88-fJ\/40-MHz [0.4 V]\u20130.61-pJ\/1-GHz [0.9 V] Dual-Mode Logic 8 $\\times$ 8 bit Multiplier Accumulator With a Self-Adjustment Mechanism in 28-nm FD-SOI<\/a>,\" in IEEE Journal of Solid-State Circuits<\/em>, pp. 560-568, vol. 54, no. 2,\u00a0 Feb. 2019<\/li>\n
  36. I. Levi<\/strong>, A. Fish, and O. Keren. \"Low-Cost Pseudoasynchronous Circuit Design Style With Reduced Exploitable Side Information.<\/a>\" IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, no. 1 (2018): 82-95.<\/em><\/li>\n
  37. R. Giterman, M. Vicentowski, I. Levi<\/strong>, Y. Weizman, O. Keren, and A. Fish. \"Leakage Power Attack-Resilient Symmetrical 8T SRAM Cell.<\/a>\" IEEE Transactions on Very Large Scale Integration (VLSI) Systems 99 (2018<\/em>): 1-5.<\/li>\n
  38. K. Nawaz, I. Levi<\/strong>, F. X. Standaert, D. Flandre, \"A Transient Noise Analysis of Secured Dual-rail based Logic Style<\/a>\" in Feedback, vol. 1, <\/em>2018<\/li>\n
  39. I. Levi<\/strong>, N. Miller, E. Avni, O. Keren, and A. Fish. \"A Survey of the Sensitivities of Security Oriented Flip-Flop Circuits<\/a>.\" IEEE Access 5 (2017)<\/em>: 24797-24809.<\/li>\n
  40. I. Levi<\/strong> and A. Fish, \"Alternative Logic Families for Energy-Efficient and High Performance Chip Design<\/a>\" in Green Photonics and Electronics,<\/em> pp. 139-172, 2017<\/li>\n
  41. I. Levi<\/strong>, A. Fish, and O. Keren. \"CPA secured data-dependent delay-assignment methodology.<\/a>\" IEEE Transactions on Very Large Scale Integration (VLSI) Systems<\/em> 25, no. 2 pp. 608-620, 2017<\/li>\n
  42. L. Moyal, I. Levi<\/strong>,\u00a0A. Teman and A. Fish, \"Synthesis of Dual Mode Logic<\/a>.\" Integration, the VLSI Journal<\/em> 55, pp. 246-253, 2016<\/li>\n
  43. R. Taco, I. Levi<\/strong>, A. Fish, and M. Lanuzza, \"Low Voltage Logic Circuits Exploiting Gate Level Dynamic Body Biasing in 28 nm UTBB FD-SOI<\/a> \", Solid State Electronics Journal<\/em>, Elsevier, vol. 117, pp. 185-192, Mar 2016.<\/li>\n
  44. M. Avital, I. Levi<\/strong>, O. Keren, and A. Fish. \"CMOS based gates for blurring power information.<\/a>\" IEEE Transactions on Circuits and Systems I: Regular Papers<\/em> 63, no. 7, pp. 1033-1042, 2016<\/li>\n
  45. V. Youzhaninov, I. Levi<\/strong> and A Fish \"Design Flow and Characterization Methodology for Dual Mode Logic<\/a>\u201d, IEEE Access<\/em>, vol. 3, pp. 3089-3101, Jan 2016<\/li>\n
  46. \u00a0I. Levi<\/strong>, O. Keren, and A. Fish, \"Data-Dependent Delays as a Barrier Against Power Attacks<\/a>\" IEEE Transactions on circuits and systems \u2013 I: Regular Papers<\/em>, vol.62, no.8, pp. 2069-2078, Aug. 2015<\/li>\n
  47. M. Avital, H. Dagan, I. Levi<\/strong>, O. Keren and A. Fish, \u201cDPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-Power Passive RFID Tags Employing S-Boxes<\/a>\u201d, IEEE Transactions on circuits and systems \u2013 I<\/em>, vol. 62, issue 1, pp. 149-156, Jan 2015<\/li>\n
  48. I. Levi<\/strong>, A. Albeck, A. Fish, and S. Wimer, \u201cA Low Energy and High Performance DM^2 Adder<\/a>,\u201d IEEE Transactions on Circuits and Systems I: Regular Papers<\/em>, vol. 61, no. 11, pp. 3175\u20133183, Nov. 2014<\/li>\n
  49. I. Levi<\/strong>, A. Belenky and A. Fish, \u201cLogical Effort for CMOS based Dual Mode Logic (DML) gates<\/a>\u201d, IEEE Transactions on VLSI systems<\/em>, vol. 22, issue 5, pp. 1042\u20131053, May 2014.<\/li>\n
  50. I. Levi<\/strong> and A. Fish, \u201cDual Mode Logic: Design for Energy Efficiency and High Performance<\/a>,\u201d IEEE Access<\/em>, vol. 1, pp. 258\u2013265, 2013<\/li>\n
  51. I. Levi<\/strong>, A. Kaizerman, and A. Fish, \u201cLow voltage dual mode logic: Model analysis and parameter extraction<\/a>,\u201d Microelectronics Journal<\/em>, Elsevier, vol. 44, issue 6, pp. 553-560, June 2013<\/li>\n
  52. I. Levi<\/strong>, \"Design and Implementation of Energy Efficient Dual Mode Logic\", 2013<\/li>\n<\/ol>\n

    Conference Proceedings:<\/span><\/h3>\n
      \n
    1. F. Berti, C. Hazay, and I. Levi<\/strong>, \u201cLR-OT: leakage-resilient oblivious transfer\u201d. In International Conference on Security and Cryptography for Networks (SCN) 2024 Sep 10 (pp. 182-204). Cham: Springer Nature Switzerland.<\/li>\n
    2. M. Avital, D. Moscovitz, and I. Levi<\/strong>, \"Enhancing EMI-Packaging to Protect against Fault Injection and Side-Channel Attacks\". IEEE International Conference on Microwaves, Communications, Antennas, Biomedical Engineering and Electronic Systems (COMCAS) 2024.<\/li>\n
    3. A. Barron, J. Shor, and I. Levi<\/strong>, \"Comparative Evaluation of Sensors for Active Adversaries by Laser Fault Injection Detection\". IEEE International Conference on Microwaves, Communications, Antennas, Biomedical Engineering and Electronic Systems (COMCAS) 2024.<\/li>\n
    4. F. Berti, C. Hazay, and I. Levi<\/strong>, \"State-of-the-Art on Leakage-Resilient Symmetric-Key Cryptography: Outlook, Challenges and Bottlenecks\u201d, IEEE International Conference on Microwaves, Communications, Antennas, Biomedical Engineering and Electronic Systems (COMCAS) 2024.<\/li>\n
    5. E. Danieli, I. Levi<\/strong>, R. Richter, and Y.Richter, \"A Taxonomy of Multi-Modal Cyber Radio Frequency (CRF) Mitigation Based on Passive Geo-location and Hardware Sensors\", IEEE COMCAS 2024.<\/li>\n
    6. N. Shalom and I. Levi<\/strong>, \"Exploring Multi-Parameter Optimization of Automated High Level Synthesis (HLS) Tools and the Difficulty of Setting Complex Constraints\", in IEEE Latin America Symposium on Circuits and Systems, LASCAS, Feb. 2023.<\/li>\n
    7. O. Ganon and I. Levi<\/strong>, \"Modular and Extensible Processor Architecture As a SW Seamless Playground, with Crypto. Application\", IEEE NEWCAS 2023.<\/li>\n
    8. D. Zooker, M. Elkoni, O. Ohev Shalom, Y. Weizman, I. Levi<\/strong>, O. Keren and A. Fish , \"Temporal Power Redistribution as a Countermeasure Against Side-Channel Attacks<\/a>\" 2020 IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>,\u00a0 pp. 1-5, Seville, Spain, 2020<\/li>\n
    9. Y. Rudin, I. Levi<\/strong>, A. Fish and O. Keren, \"FPGA Implementation of pAsynch Design Paradigm<\/a>,\" 2019 10th IFIP International Conference on New Technologies, Mobility and Security (NTMS),<\/em> pp. 1-5, Canary Islands, Spain, 2019<\/li>\n
    10. K. Nawaz, I. Levi<\/strong>, F. X. Standaert, and D. Flandre. \"A Transient Noise Analysis of Secured Dual-rail based Logic Style<\/a>\" submitted to New Generation of Circuits and Systems (NGCAS)<\/em> 2018<\/li>\n
    11. R. Taco, I. Levi<\/strong>, M. Lanuzza and A. Fish, \"Energy-delay tradeoffs of low-voltage dual mode logic in 28nm FD-SOI<\/a>,\" in 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)<\/em>,pp. 1-3,\u00a0 Burlingame, CA, 2017<\/li>\n
    12. D. Z. Raviv, I. Levi<\/strong>, A. Fish, and O Keren. \"Secured Dual-Rail-Precharge Mux-based (DPMUX) symmetric-logic for low voltage applications<\/a>.\" In SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)<\/em>, 2017 IEEE, pp. 1-2<\/li>\n
    13. M. Haber, I. Levi<\/strong>, Y. Yehoshua, and A. Fish. \"Differential input output CMOS (DINO-CMOS)\u2014High performance and energy efficient logic family<\/a>\" in SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)<\/em>, 2017 IEEE, pp. 1-3<\/li>\n
    14. R. Taco, I. Levi, M. Lanuzza, and A. Fish. \"Evaluation of Dual Mode Logic in 28nm FD-SOI technology<\/a>\" in Circuits and Systems (ISCAS), 2017 IEEE International Symposium<\/em> on, pp. 1-4<\/li>\n
    15. R. Taco, I. Levi, A. Fish, and M. Lanuzza, \"Extended Exploration of Low Granularity Back Biasing Control in 28nm UTBB FD-SOI Technology<\/a>\", IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>,\u00a0 Montreal, 2016<\/li>\n
    16. R. Taco, I. Levi<\/strong>, M. Lanuzza, and A. Fish. \"Low voltage ripple carry adder with low-granularity dynamic forward back-biasing in 28 nm UTBB FD-SOI<\/a>\" in SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)<\/em>, 2015 IEEE, pp. 1-2<\/li>\n
    17. R. Taco, I. Levi<\/strong>, A. Fish, and M. Lanuzza, \"Back-Biasing in 28nm UTBB FD-SOI sLow voltage Ripple Carry Adder with low-Granularity Dynamic Forward<\/a>\u201d, IEEE SOI-3D-Subthreshold (S3S)<\/em>, 2015<\/li>\n
    18. B. Frankel, M. Haber, M. Avital, I. Levi<\/strong>, O. Keren and A. Fish, \u201cPractical design-knobs while performing Power Analysis<\/a>\u201d Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (Trudevice 2015- COST)<\/em>, Grenoble, France, 13 Mar 2015<\/li>\n
    19. R. Taco, I. Levi<\/strong>, A. Fish, and M. Lanuzza, \u201cExploring back biasing opportunities in 28nm UTBB FD-SOI technology for subthreshold digital design,<\/a>\u201d Proc. IEEEI<\/em> 2014, pp. 1\u20134, Israel, Dec. 2014<\/li>\n
    20. R. Buzilo, B. Likhterov, R. Giterman, I. Levi<\/strong>, A. Fish and A. Belenky, \"Approach to integrated energy harvesting voltage source based on novel active TEG array system,<\/a>\" 2014 IEEE Faible Tension Faible Consommation<\/em>, pp. 1-4, Monaco, 2014<\/li>\n
    21. I. Levi<\/strong>, O. Bass, A. Kaizerman, A. Belenky and A. Fish, \u201cHigh Speed Dual Mode Logic Carry Look Ahead Adder<\/a>\u201d, Proc. IEEE International Symposium on Circuits and Systems<\/em>, pp. 3037-3040, Seoul, Korea, May 2012<\/li>\n<\/ol>\n

      Books and Book Chapters:<\/span><\/h3>\n