{"id":23,"date":"2012-05-09T22:58:30","date_gmt":"2012-05-09T19:58:30","guid":{"rendered":"http:\/\/www.eng.biu.ac.il\/kereno\/?page_id=23"},"modified":"2021-07-26T10:49:36","modified_gmt":"2021-07-26T07:49:36","slug":"publications","status":"publish","type":"page","link":"https:\/\/www.eng.biu.ac.il\/kereno\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"<h4><\/h4>\n<h4 style=\"text-align: justify\"><strong>Journal Papers<\/strong><\/h4>\n<ul style=\"text-align: justify\">\n<li><strong>O. Keren<\/strong> and S. Litsyn, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/641550\">A class of array codes correcting multiple column erasures<\/a>,\" <em>IEEE Trans. on Information Theory<\/em>, vol. 43, No. 6, pp. 1843-1851,1997<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/651073\">Codes correcting phased burst errors<\/a>,\" I<em>EEE Trans. On Information Theory<\/em>, vol. 44, no. 1, pp. 416-420, 1998<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \"The number of solutions to a system of equations and spectra of codes,\" in <em>the book \u201cFinite Fields -Theory Applications and Algorithms,\" AMS<\/em>, pp. 177-184. 1998<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/746800\">More on the distance distribution of BCH codes<\/a>,\" in\u00a0 <em>IEEE Trans. on Information Theory<\/em>, vol. 45, no. 1, pp. 251-255, 1999<\/li>\n<li><strong>O. Keren<\/strong>, \"Efficient linear decomposition of multi output Boolean functions represented in SOP form,\" <em>WSEAS transactions on circuits and systems<\/em>, vol. 5, no. 2, pp. 219-226, 2006<\/li>\n<li>V. Ostrovsky, I. Levin, <strong>O. Keren<\/strong>, B. Abramov, \"<a href=\"https:\/\/www.researchgate.net\/profile\/Binyamin_Abramov\/publication\/236091804_Designing_Concurrent_Checking_Circuits_by_using_Partitioning_1\/links\/02e7e515f350c7405b000000\/Designing-Concurrent-Checking-Circuits-by-using-Partitioning-1.pdf\">Designing Concurrent Checking Circuits by using Partitioning<\/a>,\" <em>The International Journal of Highly Reliable Electronic System<\/em>, vol. 1, no.1, pp. 1-11, 2007<\/li>\n<li>I. Levin, <strong>O. Keren<\/strong> and V. Ostrovsky, \"<a href=\"http:\/\/www.doiserbia.nb.rs\/img\/doi\/0353-3670\/2007\/0353-36700703461L.pdf\">Synthesis of Sequential Circuits by using Linearization,<\/a>\" Facta Universitatis, <em>special issue on Binary and Multiple-Valued Switching Theory and Circuit Design<\/em>, vol. 20, no. 3, pp. 461-477, 2007<\/li>\n<li><strong>O. Keren<\/strong> and I. Levin, \"Linearization of Multi-Output Logic Functions by Ordering of the Autocorrelation Values,\" <em>Facta Universitatis, special issue on Binary and Multiple-Valued Switching Theory and Circuit Design<\/em>, vol. 20, no. 3, pp. 479-498, 2007<\/li>\n<li><strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/4358255\">Reduction of Average Path Length in Binary Decision Diagrams by Spectral Methods,<\/a>\" in <em>IEEE Transactions on Computers<\/em>, vol. 57, no. 4, pp. 520-531, 2008<\/li>\n<li>B. Abramov, <strong>O. Keren<\/strong>, I. Levin and V. Ostrovsky, \"<a href=\"https:\/\/link.springer.com\/content\/pdf\/10.1134%2FS0005117909070121.pdf\">Constructing Self-testing Circuits with the Use of Step-by-step (Cascade) Control<\/a>,\" in <em>Automation and Remote Control<\/em>, vol. 70, no. 7, pp. 1217\u20131227, 2009<\/li>\n<li><strong>O. Keren<\/strong>, \"<a href=\"https:\/\/link.springer.com\/content\/pdf\/10.1007%2Fs10836-009-5139-x.pdf\">One-to-many: Context-Oriented Code for Concurrent Error Detection<\/a>,\" <em>JETTA-Journal of Electronic Testing: Theory and Applications<\/em>, vol. 26 no.3, pp. 337-353, 2010<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin and R. S. Stankovic, \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/5671542\">Determining the Number of Paths in Decision Diagrams by Using Auto correlation Coefficients<\/a>,\" in <em>IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems<\/em>, vol. 30, no. 1, pp. 31-44, 2011<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin and R. S. Stankovic, \"<a href=\"https:\/\/rd.springer.com\/content\/pdf\/10.1134%2FS0005117911030118.pdf\">Linearization of Logic Functions Defined by Disjoint Cubes. I. \u2013 Theoretical aspects,<\/a>\" in <em>Automation and Remote Control<\/em>, vol. 72, no. 3, pp 615-625, 2011<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin and R. S. Stankovic, \"<a href=\"https:\/\/rd.springer.com\/content\/pdf\/10.1134%2FS0005117911040126.pdf\">Linearization of Logic Functions Defined by Disjoint Cubes. II. \u2013 Algorithmic Aspects<\/a>,\" in <em>Automation and Remote Control<\/em>, vol. 72, no. 4, pp. 818\u2013827, 2011<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/5960792\">A Comment on the Karpovsky-Taubin Code<\/a>,\" in <em>IEEE Trans. on Information Theory<\/em>, \u00a0vol. 57, no. 12, pp. 8007-8010, Dec. 2011<\/li>\n<li><strong>O. Keren<\/strong>, \"Majority Logic Networks: BDD-Based Constructions and Their Minimization\", Facta Universitatis, <em>special issue on Binary and Multiple-Valued Switching Theory and Circuit Design<\/em> (submitted Aug 2011)1<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/epubs.siam.org\/doi\/pdf\/10.1137\/11085606X\">An Introduction to Robust Codes over Finite Fields<\/a>,\"\u00a0 <em>\u00a0Society for Industrial and Applied Mathematics\u00a0 (SIAM) Review<\/em>, vol. 55, no. 4, pp. 751\u2013763, 2013<\/li>\n<li>I. Levin and <strong>O. Keren<\/strong>, \" A <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6037388\">Generalized If-Then-Else Operator for Representation of Multi Output Functions<\/a>,\" in <em>Mathematical Problems in Engineering<\/em>, vol. 2013, Article ID 401616, 13 pages, 2013<\/li>\n<li>A. Burg and <strong>O. Keren<\/strong> , \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/6845373\">Universal Hardware for Systems\u00a0 with Acceptable Representations as Low Order Polynomials<\/a>\", in <em>IEEE Transactions on Circuits and Systems I: Regular Papers<\/em>, vol. 61, no. 10, pp. 2878-2887, Oct. 2014<\/li>\n<li>A. Burg and <strong>O. Keren<\/strong>, \"<a href=\"http:\/\/www.eng.biu.ac.il\/kereno\/files\/2019\/08\/On-the-Efficiency-of-Berger-Codes-against-Error-Injection-attacks-on-parallel-asynchronous-communication-channels.pdf\">On the Efficiency of Berger Codes against Error Injection attacks on parallel asynchronous communication channels<\/a>\", in <em>Information Security Journal: A Global Perspective. <\/em>Special issue on Trustworthy Manufacturing and Utilization,\u00a0 vol. 22, no. 5-6, pp. 208-215, 2013. Published on-line 2014<\/li>\n<li>I. Shumsky and\u00a0 <strong>O. Keren<\/strong>, \" <a href=\"https:\/\/www.tandfonline.com\/doi\/abs\/10.1080\/19393555.2014.891276\">Enhancement of Hardware Security by Hamming Ball Based State Assignment<\/a>\", in <em>Information Security Journal: A Global Perspective. <\/em>Special issue on Trustworthy Manufacturing and Utilization, vol. 22, no. 5-6, pp. 216-225,\u00a0 2013. Published on-line 2014<\/li>\n<li>I. Levin, <strong>O. Keren<\/strong> , V. Sinelnikov, \u00a0\"Improving Hardware Security by Using Hidden Information of Computer systems\", in <em>JNIT: Journal of Next Generation Information Technology<\/em>, vol. 4, no. 6, pp. 108- 117, 2013<\/li>\n<li>Y. Neumeier, <strong>O. Keren,<\/strong> \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6762956\">Robust Generalized Punctured Cubic Codes<\/a>\",in <em>IEEE Trans. on Information theory<\/em>, \u00a0vol. 60, no. 5, pp. 1-10, May 2014<\/li>\n<li>M. Avital, H. Dagan, I. Levi, <strong>O. Keren<\/strong>, and A. Fish, \u201c<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6998067\">DPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-Power Passive RFID Tags<\/a>\", in <em>IEEE Trans. on Circuits and Systems-I,<\/em> vol. 62, no.1, pp. 149-156, 2015<\/li>\n<li><span style=\"background-color: #ffffff;color: #000000\">M.\u00a0<a style=\"background-color: #ffffff;color: #000000\" href=\"http:\/\/dblp.uni-trier.de\/pers\/hd\/a\/Avital:Moshe\">Avital<\/a>,\u00a0<a style=\"background-color: #ffffff;color: #000000\" href=\"http:\/\/dblp.uni-trier.de\/pers\/hd\/d\/Dagan:Hadar\">H. Dagan<\/a>,\u00a0<\/span><strong>O. Keren<\/strong>,\u00a0<span style=\"color: #000000\"><a style=\"color: #000000\" href=\"http:\/\/dblp.uni-trier.de\/pers\/hd\/f\/Fish:Alexander\">A. Fish<\/a><\/span>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6825857\">Randomized Multitopology Logic Against Differential Power Analysis<\/a>\",\u00a0 in <em>IEEE Trans. VLSI Syst<\/em>. 23(4), pp. 702-711, 2015<\/li>\n<li><strong>O. Keren<\/strong> and M. Karpovsky, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6975105\">Relations between the Entropy of a Source and the Error Masking Probability for Security Oriented Codes<\/a>\", in <em>IEEE trans. On Communications ,<\/em> vol. 63, no. 1, pp. 206-214, 2015<\/li>\n<li>I. Levi, <strong>O. Keren<\/strong>, A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7166411\">Data-Dependent Delays as a Barrier Against Power Attacks<\/a>\",\u00a0 in <em>IEEE Trans. on Circuits and Systems-I<\/em> , vol. 62, no. 8, pp. 2269-2278, 2015<\/li>\n<li>Y. Neumeier, Y. Pesso and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7229372\">Efficient Implementation of Punctured Parallel Finite Field Multipliers<\/a>\", in\u00a0 <em>IEEE Trans. on Circuits and Systems-I<\/em> ,\u00a0 vol. 62, no. 9, pp. 2260-2267, 2015<\/li>\n<li>Sharon Shetrit, Y. Murin, R. Dabora, <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/www.researchgate.net\/publication\/282403947_A_new_approach_to_UEP-HARQ_via_convolutional_codes\">A New Approach to UEP-HARQ via Convolutional Codes<\/a>\",\u00a0 in<em> IEEE Communications Letters<\/em>, 19(12), pp. 2062-2065, 2015.<\/li>\n<li>M. Avital, I. Levi, <strong>O. Keren<\/strong>, and A. Fish, \u201c<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7494672\">CMOS based Gates for Blurring Power Information<\/a> \", in <em>IEEE Trans. on Circuits and Systems-I<\/em> , 63-I(7), pp.\u00a0 1033-1042 , 2016<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7775088\">Reliable Communications across Parallel Asynchronous Channels with Arbitrary Skews,<\/a>\" in <em>IEEE Trans. on Information Theory<\/em>, vol. 63 no. 2, pp. 1120-1129, 2017<\/li>\n<li>I. Levi, A. Fish and <strong>O. Keren<\/strong> \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7527634\">CPA Secured Data-Dependent Delay-Assignment Methodology<\/a>\",\u00a0 in <em>IEEE Trans. on Circuits and Systems-I<\/em> , March 2016, vol. 25 no. 2, pp.\u00a0 608-620, 2017<\/li>\n<li>I. Levi, N. Miller, E. Avni, <strong>O. Keren<\/strong> and A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8094119\">A Survey of the Sensitivities of Security Oriented Flip-Flop Circuits<\/a>\",\u00a0 in <em>IEEE Access<\/em>, vol. 5, pp. 24797-24809, 2017<\/li>\n<li>H. Rabii, Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8318671\">High rate robust codes with low implementation complexity<\/a>\", in <em>IEEE Transactions on Dependable and Secure Computing<\/em>, vol. 16, no. 3, pp. 511-520, 1 May-June 2019<\/li>\n<li>I. Levi, <strong>O. Keren<\/strong> and A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8070392\">Low-Cost Pseudo-Asynchronous Circuit Design Style with Reduced Exploitable Side-Information<\/a>\", in <em>IEEE Transactions on Very Large Scale Integration (VLSI) Systems<\/em>, no. 99, pp. 1-14,\u00a0 2018<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/cyberleninka.ru\/article\/n\/error-correcting-codes-for-ternary-content-addressable-memories-a-new-perspective\/viewer\">Error-Correcting Codes for Ternary Content Addressable Memories: a New Perspective<\/a>\" in <em>Information and Control Systems<\/em>, no. 1, pp. 68\u201373, 2018<\/li>\n<li>Y. Shifman, A. Miller, <strong>O. Keren<\/strong>, Y. Weizmann and J. Shor, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8519616\">A Method to Improve Reliability in a 65nm SRAM PUF Array<\/a>\", in <em>IEEE Solid-State Circuits Letters<\/em>, vol. 1, no. 6, pp. 138-141, June 2018<\/li>\n<li>R. Giterman, M. Vicentowski, I. Levi, Y. Weizman,<strong> O. Keren<\/strong>, and A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8374988\">Leakage Power Attack-Resilient Symmetrical 8T SRAM Cell<\/a>\", in <em>IEEE Transactions on Very Large Scale Integration Systems<\/em>,\u00a0 vol. 26, pp. 2180-2184, Oct. 2018<\/li>\n<li>R. Giterman, <strong>O. Keren<\/strong> and A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8572791\">A 7T Security Oriented SRAM Bitcell,<\/a>\" in\u00a0<em>IEEE Transactions on Circuits and Systems II: Express Briefs<\/em>, vol. 66, no. 8, pp. 1396-1400, Aug. 2019<\/li>\n<li>H. Rabii and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s12095-018-0340-3\">A New Class of Security Oriented Error Correcting Robust Codes<\/a>\",\u00a0 \u00a0in <em>Cryptography and Communications,<\/em>\u00a0 11, pp. 965\u2013978, Sep. 2019<\/li>\n<li>M. Gay, B. Karp, <strong>O. Keren<\/strong> and I. Polian, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8673322\">Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii\u2013Keren Codes<\/a>,\" in <em>IEEE Embedded Systems Letters<\/em>, vol. 11, no. 4, pp. 115-118, Dec. 2019<\/li>\n<li>D. Zooker, M. Avital, Y. Weizman, A. Fish and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/www.researchgate.net\/publication\/334503600_Silicon_Proven_18mm92mm_65nm_Digital_Bit_Generator_for_Hardware_Security_Applications\">Silicon Proven 1.8 \u03bcm\u00d79.2\u03bcm 65-nm Digital Bit Generator for Hardware Security Applications<\/a>\", in <em>IEEE Transactions on Circuits and Systems II: Express Briefs<\/em>, vol. 66, no. 10, pp. 1713-1717, Oct. 2019<\/li>\n<li>H. Rabii and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s12095-018-0340-3\">A new class of security oriented error correcting robust codes<\/a>\" in <em>Cryptography and Communications, <\/em>vol<em>. <\/em>11,\u00a0 issue 5, pp. 965\u2013978, Sep. 2019<\/li>\n<li>Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8758794\">On the Existence of Security Enhancing Converter Designs for Multi-Level Memories<\/a>,\" in <em>IEEE Transactions on Circuits and Systems II: Express Briefs<\/em>, vol. 67, no. 6, pp. 1119-1123, June 2020<\/li>\n<li>Y. Shifman, A. Miller, <strong>O. Keren<\/strong>, Y. Weizman and J. Shor, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9104879\">An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability<\/a>,\" in <em>IEEE Transactions on Circuits and Systems I: Regular Papers<\/em>, June 2020<\/li>\n<li><strong>O. Keren<\/strong> and I. Polian, \"<a href=\"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s13389-020-00229-4.pdf\">IPM-RED: combining higher-order masking with robust error detection<\/a>\" in <em>Journal of Cryptographic Engineering,\u00a0<\/em> pp. 1-14<em>, <\/em>June 2020<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/8917707\">Constructive Bounds on the Capacity of Parallel Asynchronous Skew-Free Channels With Glitches<\/a>,\" in <em>IEEE Transactions on Information Theory<\/em>, vol. 66, no. 7, pp. 4026-4037, July 2020<\/li>\n<li>M. Gay, B. Karp, <strong>O. Keren<\/strong>, et al. \"<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s13389-020-00234-7\">Error control scheme for malicious and natural faults in cryptographic modules<\/a>\",\u00a0 <em>Journal Cryptogr<\/em> Eng (2020)<\/li>\n<li>D. Zooker, O. Ohev Shalom, Y. Weizman, A. Fish and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9139327\">Toward Secured FPGA: Silicon Proven CLB With Reduced Information Leakage<\/a>\", in <em>IEEE Solid-State Circuits Letters<\/em>, vol. 3, pp. 146-149, 2020.<\/li>\n<li>Y. Shifman, A. Miller, <strong>O. Keren<\/strong>, Y. Weizman and J. Shor, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9277526\">A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF\"<\/a> in <em>IEEE Access<\/em>, vol. 8, pp. 219137-219150, 2020.<\/li>\n<li>Y. Weizman, R. Giterman, O. Chertkow, M. Vizentovski, I. Levi, I. Sever, I. Kehati, <strong>O. Keren<\/strong>, and A. Fish,\u00a0 \"Low-Cost Side-Channel Secure Standard 6T SRAM Based Memory with a 1% Area and less than 5% Latency and Power Overheads\" - <em>IEEE Access<\/em>, 2021<\/li>\n<\/ul>\n<h4 style=\"text-align: justify\"><strong>Papers in refereed proceedings<\/strong><\/h4>\n<ul style=\"text-align: justify\">\n<li><strong>O. Keren<\/strong> and S. Litsyn, \u201cMDS codes correcting erasures,\" T<em>he 2nd Mediterranean workshop on Coding and Information Integrity<\/em>, Palma de Mallorca, Spain, 1996<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \u201c<a href=\"https:\/\/ieeexplore.ieee.org\/document\/641550\">A class of array codes correcting multiple column erasures<\/a>,\" <em>the 19th Convention of Electrical and Electronics Engineers in Israel<\/em>. Jerusalem, Israel, pp. 336-339, 1996<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \u201c<a href=\"https:\/\/ieeexplore.ieee.org\/document\/651073\">Codes correcting phased burst errors<\/a>,\" <em>IEEE Information theory workshop<\/em>, Longyearbyen, Norway, 1997<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \u201cOn spectra of BCH codes,\" <em>The 3rd Mediterranean workshop on coding and information integrity,<\/em> Ein Boqeq, Israel, 1997<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \u201c<a href=\"https:\/\/ieeexplore.ieee.org\/document\/709068\">On the distance distribution of BCH codes<\/a>,\" <em>IEEE International Symposium on Information Theory<\/em>, MIT, Cambridge, MA USA, p.463, 1998<\/li>\n<li><strong>O. Keren<\/strong> and S. Litsyn, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/924389\">A lower bound on the probability of decoding error over a BSC channel<\/a>,\" <em>The 21st IEEE Electrical and Electronic Engineers in Israel,<\/em> pp. 271-273, 2000<\/li>\n<li><strong>O. Keren<\/strong>, \"Low Complexity Linear Decomposition at the Disjoint Cubes Domain,\" <em>WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications<\/em>, Madrid, Spain, pp. 176-181, 2006<\/li>\n<li>I. Levin, <strong>O. Keren<\/strong>, G. Kolotov and M. Karpovsky, \"Piecewise linearization of logic functions,\" in <em>Proc. of the 2006 International Workshop on Spectral Methods and Multirate Signal Processing<\/em>, pp. 345-353, 2006<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin\u00a0 and R. S. Stankovic, \"<a href=\"https:\/\/www.tau.ac.il\/~ilia1\/publications\/bddnofpaths.pdf\">Reduction of the Number of Paths in Binary Decision Diagrams by Linear Transformation of Variables<\/a>\" , in <em>Proc. of the 7th International Workshop on Boolean Problems,<\/em> pp. 79-84, Freiberg, Germany,\u00a0 2006<\/li>\n<li>I. Levin, V. Ostrovsky, <strong>O. Keren <\/strong>and\u00a0V. Sinelnikov, \"<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1690062\">Cascade Scheme for Concurrent Errors Detection<\/a>,\" <em>The 9th EUROMICRO Conference on Digital System Design (DSD'06)<\/em>, pp. 359-368, 2006<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin and R. S. Stankovic, \"<a href=\"http:\/\/mondrian.tau.ac.il\/~ilia1\/MY_PAPERS-PDF\/Procidings\/LinDC.pdf\">Linearization of Functions Represented as a Set of Disjoint Cubes at the Autocorrelation Domain<\/a>,\" in <em>Proc. of the 7th International Workshop on Boolean Problems<\/em>, pp. 137-144,\u00a0 Freiberg, Germany, 2006.<\/li>\n<li>I. Levin, <strong>O. Keren<\/strong>, V. Ostrovsky and G. Kolotov, \"<a href=\"https:\/\/www.tau.ac.il\/~ilia1\/publications\/concdecc.pdf\">Concurrent Decomposition of Multi-terminal BDDs<\/a>,\" <em>The 7th International Workshop on Boolean Problems<\/em>, pp. 129-136, Freiberg, Germany,\u00a0 2006<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin and R. S. Stankovic, \u201c<a href=\"https:\/\/link.springer.com\/content\/pdf\/10.1007%2F978-0-387-89558-1_2.pdf\">Use of Gray Decoding for Implementation of Symmetric Functions<\/a>,\u201d in <em>Proc. of the VLSI-SoC 2007<\/em>, pp.25-30, Atlanta U.S.A., 2007<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin and M. Karpovsky, \"<a href=\"https:\/\/www.researchgate.net\/profile\/Ilya_Levin\/publication\/242156743_Non-redundant_Scheme_for_Arbitrary_Error_Detection_in_Combinational_Circuits\/links\/0c960529756262e95c000000\/Non-redundant-Scheme-for-Arbitrary-Error-Detection-in-Combinational-Circuits.pdf\">Non-redundant Scheme for Arbitrary Error Detection in Combinational Circuits<\/a>,\" <em>IFIP\/IEEE VLSI-SoC - International Conference on Very Large Scale Integration<\/em>, pp. 575-580, 2008<\/li>\n<li>V. Ostrovsky, <strong>O. Keren <\/strong>and\u00a0I. Levin, \"<a href=\"https:\/\/s3.amazonaws.com\/academia.edu.documents\/42575058\/Boundary-final-Boolean-1.pdf?response-content-disposition=inline%3B%20filename%3DDesigning_of_QCA_Schemes_by_Boundary_Fun.pdf&amp;X-Amz-Algorithm=AWS4-HMAC-SHA256&amp;X-Amz-Credential=AKIAIWOWYYGZ2Y53UL3A%2F20190819%2Fus-east-1%2Fs3%2Faws4_request&amp;X-Amz-Date=20190819T092958Z&amp;X-Amz-Expires=3600&amp;X-Amz-SignedHeaders=host&amp;X-Amz-Signature=a207a5c0bc5c3c38d4d0b8eb954cc0ae5ebb2cc2e766d2050794d0823690d82b\">Designing of QCA Schemes by Boundary Functions<\/a>,\" <em>8th International Workshop on Boolean Problems,<\/em> pp. 67-73, Freiberg, Germany,\u00a0 2008<\/li>\n<li>I. Levin and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/pdfs.semanticscholar.org\/9b06\/a791004adf741b9bf17bdbc80a2fd6fe007e.pdf\">Split Multi-terminal Binary Decision Diagrams<\/a>,\" <em>The 8th International Workshop on Boolean Problems<\/em>, pp. 161-167, Freiberg, Germany, 2008<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin, V. Ostrovsky, and B. Abramov, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4641192\">Arbitrary Error Detection in Combinational Circuits by using Partitioning,<\/a>\" <em>The 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'08)<\/em>, pp. 361-369, 2008<\/li>\n<li>V. Ostrovsky, <strong>O. Keren<\/strong> and I. Levin, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4638331?reload=true&amp;arnumber=4638331\">Programmable Comparators Based Array for Regular QCA Implementation,<\/a>\" <em>International Workshop on Design and Test of Nano Devices, Circuits and Systems (IEEE NDCS'08)<\/em>, pp. 39-42, 2008<\/li>\n<li>S. Baranov, I. Levin, <strong>O. Keren<\/strong>, and M. Karpovsky, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5196021\">Designing Fault Tolerant FSM by Nano-PLA<\/a>,\" <em>IEEE International On-Line Testing Symposium (IOLTS 2009)<\/em>, pp. 229-234, Sesimbra-Lisbon, Portugal, 2009<\/li>\n<li><strong>O. Keren<\/strong>, I. Levin, and M. Karpovsky, \"<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5634882\">Duplication Based One-to-many Coding for Trojan HW Detection<\/a>,\" <em>IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'10)<\/em>, pp. 160-166, 2010<\/li>\n<li>I. Levin and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/www.researchgate.net\/profile\/Ilya_Levin\/publication\/267848517_Transforming_FSMs_for_Synthesis_by_Fault_Tolerant_Nano-PLAs\/links\/547314150cf2d67fc035db90\/Transforming-FSMs-for-Synthesis-by-Fault-Tolerant-Nano-PLAs.pdf\">Transforming FSMs for Synthesis by Fault Tolerant Nano-PLAs<\/a>,\" 9th International Workshop on Boolean Problems, pp. 75-82, Freiberg, Germany,\u00a0 2010<\/li>\n<li><strong>O. Keren<\/strong>, \"Adaptive Hardware Based on the Inverse WalshTransform,\" Reed-Muller workshop, pp. 21-26, Finland, 2011<\/li>\n<li style=\"text-align: left\"><strong>O. Keren<\/strong>, I. Levin and V. Sinelnikov, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5993839\">Detection of Trojan HW by using hidden information on the system<\/a>,\" <em>IEEE International On-Line Testing Symposium (IOLTS 2011)<\/em>, pp. 194-195, 2011.<\/li>\n<li>I. Levin and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6037388\">Generalized If-Then-Else Operator for Compact Polynomial Representation of Multi Output Functions<\/a><a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6037388\">,<\/a>\" <em>The 14th EUROMICRO Conference on Digital System Design (DSD'11)<\/em>, pp. 15-20, 2011<\/li>\n<li>Y.\u00a0 Neumeier and <strong>O. Keren<\/strong>, '' <a href=\"https:\/\/ieeexplore.ieee.org\/document\/6313863\">Punctuated Karpovsky-Taubin Binary Robust Error Detecting Codes for Cryptographic Devices<\/a>,'' <em>IEEE International On-Line Testing Symposium<\/em>, pp. 156-161, Sitges, Spain,\u00a0 2012<\/li>\n<li>\u00a0A.\u00a0 Burg and <strong>O. Keren<\/strong>, ''<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6313857\">Functional Level Embedded Self-Testing for Walsh Transform Based Adaptive Hardware<\/a>'' , <em>IEEE International On-Line Testing Symposium<\/em>, pp. 134-135, Sitges, Spain, 2012<\/li>\n<li>A. Burg, <strong>O. Keren<\/strong> and I. Levin, <a href=\"http:\/\/mondrian.tau.ac.il\/~ilia1\/publications\/94-burg-keren-levin-2012.pdf\">Functional Testing of Boolean Systems with Unknown Functionality<\/a>\", \u00a0<em>10th International Workshop on Boolean Problems, pp. 25-32, <\/em>Freiberg,\u00a0 Germany, \u00a02012<\/li>\n<li>Y. Manzor adn <strong>O. Keren<\/strong>, \"Amalgamated Codes for Flash Memories\", <em>IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'12),<\/em> Texas, 2012.<\/li>\n<li>N. Admaty, S. Litsyn and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6376995\">Puncturing, Expurgating and Expanding the q-ary BCH Based Robust Codes<\/a>\", <em>IEEE 27th Convention of Electrical &amp; Electronics Engineers in Israel (IEEEI 2012)<\/em><\/li>\n<li>I.\u00a0 Shumsky,\u00a0 <strong>O. Keren<\/strong> and M. Karpovsky, \"<a href=\"https:\/\/pdfs.semanticscholar.org\/e8d5\/f8441994582e44420502117a402e6743ed45.pdf\">Robustness of Security-Oriented Binary Codes Under Non-Uniform Distribution of Codewords<\/a>\", <em>Dependable Computing and Communications Symposium at the International Conference on Dependable Systems and Networks, DSN-DCCS<\/em>, pp. 25-30, August 2013<\/li>\n<li>I.\u00a0 Shumsky and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/pdfs.semanticscholar.org\/5ab0\/714d4ea3455f54141af5f9c344626130d429.pdf\">Security-Oriented State Assignment<\/a>\", TRUDEVICE, The 1st\u00a0 Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2013.<\/li>\n<li>A. Burg and <strong>O. Keren<\/strong>, \"On the Robustness of Berger Codes Against Error Injection Attacks\",\u00a0 <em>TRUDEVICE, The 1st\u00a0 Workshop on Trustworthy Manufacturing and Utilization of Secure Devices<\/em>, May \u00a02013<\/li>\n<li>Y.\u00a0 Neumeier and <strong>O. Keren<\/strong>, \u201c<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6847800\">A New Efficiency Criterion for Security Oriented Error Correcting Codes<\/a>\u201d, <em>19th IEEE European Test Symposium, <\/em>Germany,\u00a0 May<em> \u00a0<\/em>2014<\/li>\n<li>V. Tomashevich, Y. Neumeier, R. Kumar, <strong>O. Keren<\/strong> and I. Polian, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6962084\">Protecting Cryptographic Hardware against Malicious Attacks by Nonlinear Robust Codes<\/a>\",\u00a0 <em>The\u00a0 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'14),<\/em> pp. 40-45, Amsterdam, October 2014<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7133092\">Zero-Latency Zero-Error Codes for Parallel Asynchronous Channels with Arbitrary Skews<\/a>\" , <em>IEEE Information Theory Workshop (ITW)<\/em>, pp. 1-4, Israel, 2015<\/li>\n<li>Y. Neumeier and <strong>O. Keren<\/strong>,\u00a0 \"Expurgated\u00a0 Codes for Detecting Jamming in q-ary Memories\", <em>The Ninth International Conference on Dependability<\/em>, DEPEND \u00a02016<\/li>\n<li>H. Rabii, Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/www.researchgate.net\/profile\/Yaara_Neumeier\/publication\/309617078_Low_Complexity_High_Rate_Robust_Codes_Derived_from_the_Quadratic-Sum_Code\/links\/5819fd9408aeffb294130a73\/Low-Complexity-High-Rate-Robust-Codes-Derived-from-the-Quadratic-Sum-Code.pdf\">Low Complexity High Rate Robust Codes Derived from the Quadratic-Sum Code<\/a>\", <em>International Workshop on Boolean Problems (IWBP)<\/em>, 2016<\/li>\n<li>H. Rabii, Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/www.researchgate.net\/profile\/Yaara_Neumeier\/publication\/309617078_Low_Complexity_High_Rate_Robust_Codes_Derived_from_the_Quadratic-Sum_Code\/links\/5819fd9408aeffb294130a73\/Low-Complexity-High-Rate-Robust-Codes-Derived-from-the-Quadratic-Sum-Code.pdf\">Low Complexity High Rate Robust Codes<\/a>\", <em>TRUDEVICE workshop<\/em>, Barcelona, Nov. 2016<\/li>\n<li>B. Karp, Y. Berkowitz, and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8046213\">Jamming Resistant Encoding For Non-Uniformly Distributed Information<\/a>\", <em>IOLTS<\/em> 2017<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"Reliable Communication across Parallel Asynchronous Channels with Glitches\", <em>5ICMCTA<\/em>, August 2017<\/li>\n<li>H. Rabii and <strong>O. Keren<\/strong>, \"A New Construction of Minimum Distance Robust Codes\", <em>5ICMCTA<\/em>, \u00a0August 2017<\/li>\n<li>D. Zooker, M. Wicentowski, Y. Weizman, A. Fish, and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8090391\">Vulnerability of Secured IoT Memory Against Localized Back Side Laser Fault Injection<\/a>\", <em>Seventh IEEE International Conference on Emerging Security Technologies - EST 2017<\/em><\/li>\n<li>B. Karp, M.Gay, <strong>O. Keren<\/strong> and I. Polian, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8681476\">Security-oriented Code-based Architectures for Mitigating Fault Attacks<\/a>\", <em>Design of Circuits and Integrated Systems (DCIS)<\/em>, Lyon, 14th-16th November 2018<\/li>\n<li style=\"text-align: left\">B. Karp, M. Gay, <strong>O. Keren<\/strong> and I. Polian, \"<a href=\"http:\/\/www.eng.biu.ac.il\/kereno\/files\/2019\/08\/Detection_and_Correction_of_Malicious_and_Natural_Faults_in_Cryptographic_Modules-2.pdf\">Detection_and_Correction_of_Malicious_and_Natural_Faults_in_Cryptographic_Modules (2)<\/a>\", <em>The 7th International Workshop on Security Proofs for Embedded Systems (PROOFS)<\/em>, Amsterdam, September 13th, 2018<\/li>\n<li>R. Giterman, <strong>O. Keren<\/strong>, and A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8640163\">Improving the Security of a 6T SRAM using Body-Biasing in 28 nm FD-SOI<\/a>\", <em>the 2018 IEEE S3S Conference<\/em>, October 2018<\/li>\n<li>A. Miller, Y. Shifman, Y. Weizman, <strong>O. Keren<\/strong> and J. Shor, \"<a href=\"http:\/\/www.eng.biu.ac.il\/shorjos\/files\/2019\/04\/PID5679461_PUF-2019.pdf\">A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10<\/a>,\" <em>2019 IEEE Custom Integrated Circuits Conference (CICC)<\/em>, pp. 1-4, Austin, TX, USA, 2019<\/li>\n<li>D. Zooker, A. Fish, <strong>O. Keren<\/strong> and Y. Weizman, \"Compact Sub-Vt Optical Sensor for the Detection of Fault Injection in Hardware Security Applications,\" <em>2019 10th IFIP International Conference on New Technologies, Mobility and Security (NTMS)<\/em>, pp. 1-5, CANARY ISLANDS, Spain, 2019<\/li>\n<li>Y. Rudin, I. Levi, A. Fish and <strong>O. Keren<\/strong>, \"FPGA Implementation of pAsynch Design Paradigm,\" <em>2019 10th IFIP International Conference on New Technologies, Mobility and Security (NTMS)<\/em>, pp. 1-5, CANARY ISLANDS, Spain, 2019<\/li>\n<li>B. Karp, O. Amrani and <strong>O. Keren<\/strong>, \"Nonlinear Product Codes for Reliability and Security,\" <em>2019 IEEE 4th International Verification and Security Workshop (IVSW)<\/em>, pp. 13-18, Rhodes Island, Greece, 2019<\/li>\n<li>H. Martin, E. Vatajelu, G. Di Natale and <strong>O. Keren<\/strong>, \"On the Reliability of the Ring Oscillator Physically Unclonable Functions,\" <em>2019 IEEE 4th International Verification and Security Workshop (IVSW)<\/em>, pp. 25-30, Rhodes Island, Greece, 2019<\/li>\n<li><strong>O. Keren<\/strong> and I. Polian, \"<a href=\"\/Users\/User\/Downloads\/A_comment_on_information_leakage_from_robust_code-based_checkers_detecting_fault_attacks_on_cryptographic_primitives.pdf\">A comment on information leakage from robust code-based checkers detecting fault attacks on cryptographic primitives<\/a>\", <em>Proceedings of 8th International Workshop<\/em>, v. 11, pp. 49-63, Sep. 2019<\/li>\n<li>R. Giterman, M. Wicentowski, O. Chertkow, I. Sever, I. Kehati, Y. Weizman, <strong>O. Keren<\/strong> and\u00a0 A. Fish, \"Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications,\" <em>ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)<\/em>, pp. 69-72, Cracow, Poland, 2019<\/li>\n<li>D. Zooker, M. Elkoni, O. Ohev Shalom, Y. Weizman, I. Levi, <strong>O. Keren<\/strong> and A. Fish, \"Temporal Power Redistribution as a Countermeasure Against Side-Channel Attacks\" <em>2020 IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>,\u00a0 Seville, Spain, 2020<\/li>\n<\/ul>\n<h4 style=\"text-align: justify\"><strong>Compendium of New Refereed Papers:<\/strong><\/h4>\n<ul style=\"text-align: justify\">\n<li><strong>O. Keren<\/strong>, I. Levin and R. S. Stankovic, \"Use of Gray Coding for Implementation of Symmetric Functions,\" <em>VLSI-SoC: Advanced Topics on Systems on Chip, Series: Advances in Information and Communication Technology<\/em>, Vol. 291, Ricardo Reis\u200f, Vincent Mooney\u200f, Paul Hasler\u200f (Eds.) Springer, pp. 17-32, 2009<\/li>\n<li>A. Burg, <strong>O. Keren<\/strong>, I. Levin, \"Blind Testing of Polynomials by Linear Checks\", <em>Recent Progress in the Boolean Domain<\/em>, Edited by Bernd Steinbach, \u00a0Cambridge Scholars Publishing , pp. 322-346, April 2014<\/li>\n<li>H. Rabii, Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/www.researchgate.net\/profile\/Yaara_Neumeier\/publication\/309617078_Low_Complexity_High_Rate_Robust_Codes_Derived_from_the_Quadratic-Sum_Code\/links\/5819fd9408aeffb294130a73\/Low-Complexity-High-Rate-Robust-Codes-Derived-from-the-Quadratic-Sum-Code.pdf\">Low Complexity High Rate Robust Codes<\/a>\", <em>Further Improvements in the Boolean Domain<\/em>, Edited by Bernd Steinbach, Cambridge Scholars Publishing, pp. 303-313, 2017<\/li>\n<\/ul>\n<h4 style=\"text-align: justify\"><strong>Other publications<\/strong><\/h4>\n<ul style=\"text-align: justify\">\n<li><strong>O. Keren<\/strong> and I. Levin \"Linearization of the Logic Functions Defined in SOP Form,\" UROMICRO SEAA \/ DSD 2005, Porto (Portugal), work in progress, 2005<\/li>\n<li>B. Abramov, <strong>O. Keren <\/strong>and\u00a0I. Levin, \"<a href=\"https:\/\/www.mes.tu-darmstadt.de\/media\/mikroelektronische_systeme\/pdf_3\/ewme2010\/proceedings\/posteri\/abramov_paper.pdf\">Teaching Cognitive-Inspired Design of Sequential Circuits<\/a>,\" The 8th European Workshop on Microelectronics Education, Darmstadt, Germany, 2010.<\/li>\n<li><strong>O. Keren<\/strong> and I. Levin, \"Transforming Fault Tolerant Implementation of FSMs by Dense Nano-PLA,\" IEEE East-West Design &amp; Test Symposium (EWDTS), 2010.<\/li>\n<li>Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6847800\">A New Efficiency Criterion for\u00a0 Error Correcting Robust codes<\/a>\",\u00a0 <em>Trustworthy Manufacturing and Utilization of Secure Devices workshop<\/em>, Freiburg, Dec. 2013. (poster)<\/li>\n<li>Pesso, Y. Neumeier and <strong>O. Keren<\/strong>, \"Efficient Implementation of Checkers for Punctured Cubic Codes\", <em>Trustworthy Manufacturing and Utilization of Secure Devices workshop<\/em>, Freiburg, Dec. 2013<\/li>\n<li><strong>O. Keren<\/strong>, \"Security Oriented Codes\", <em>IEEE 28th Convention of Electrical &amp; Electronics Engineers in Israel (IEEEI 2014).<\/em> (Invited talk.)<\/li>\n<li>Haber, B. Frankel, M. Avital, I. Levi, <strong>O. Keren<\/strong> and A. Fish, \"Practical design-knobs while performing Power Analysis\", <em>TRUDEVICE<\/em> 2014<\/li>\n<li>Sklavos, J. C. Resende, R. Chaves, F. Regazzoni and <strong>O. Keren<\/strong>, \"<a href=\"http:\/\/mocast.physics.auth.gr\/images\/NewPapers\/PAPER_42F.pdf\">Efficiency of Cryptography for Multi-Algorithm Computation on Dedicated Structures<\/a>\", International Conference on Modern Circuits and Systems Technologies 2015 (MOCAST'15), Thessaloniki, Greece; 05\/2015. (Invited paper)<\/li>\n<li>Y. Neumeier and <strong>O. Keren<\/strong>, \"Protecting Multilevel Memories from Fault Attacks Using Robust Codes\", <em>TRUDEVICE<\/em> 2015<\/li>\n<li><strong>O. Keren<\/strong>, \"Security oriented codes: attacks and countermeasures\", Schloss Dagstuhl on \"Hardware Security\", Germany May 16 to\u00a0\u00a0 May 20, 2016<\/li>\n<li>I. Levi, <strong>O. Keren<\/strong>, A.Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7166411\">Data-Dependent Delays As a Barrier Against Power Attacks<\/a>\", TCAS Special: C<em>ryptography &amp; Security II Session, IEEE International symposium on circuits and systems, ISCAS 2016,<\/em> May 22-25, Baltimore, USA<\/li>\n<li>M. Avital, H. Dagan, <strong>O. Keren<\/strong> and A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6825857\">Randomized Multi-Topology Logic Against Differential Power Analysis<\/a>\", TCAS Special: Cryptography &amp; Security II Session, IEEE International symposium on circuits and systems, ISCAS 2016, May 22-25, Baltimore, USA.<\/li>\n<li>M. Avital, H. Dagan, I. Levi, <strong>O. Keren<\/strong> and\u00a0 A. Fish, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6998067\">DPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-Power Passive RFID Tags Employing S-Boxes<\/a>\", <em>TCAS Special: Cryptography &amp; Security II Session,\u00a0 IEEE International symposium on circuits and systems, ISCAS 2016<\/em>, May 22-25, Baltimore, USA<\/li>\n<li><strong>O. Keren<\/strong>, I. Polian and M. Tehranipoor, Hardware Security (Dagstuhl Seminar 16202). <a href=\"http:\/\/dblp.uni-trier.de\/db\/journals\/dagstuhl-reports\/dagstuhl-reports6.html#KerenPT16\">Dagstuhl Reports\u00a06(5)<\/a>, pp. 72-93, 2016<\/li>\n<li>M. Avital, A. Fish and <strong>O. Keren<\/strong>, \" <a href=\"https:\/\/upcommons.upc.edu\/bitstream\/handle\/2117\/99316\/FCTRU_2016_27_From_Full_Custom.pdf?sequence=1&amp;isAllowed=y\">From Full-Custom to Fully-Standard Cell Power Analysis Countermeasures<\/a>\", TRUDEVICE workshop, Barcelona, Nov. 2016<\/li>\n<li>Y. Weizman, B. Karp and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/upcommons.upc.edu\/bitstream\/handle\/2117\/99320\/FCTRU_2016_31_Modeling_SRAM_cell.pdf\">Modeling SRAM cell stability for randomness evaluation of PUF cells<\/a>\", <em>TRUDEVICE workshop,<\/em> Barcelona, Nov. 2016<\/li>\n<li>Y. Neumeier and <strong>O. Keren<\/strong>, \"Robust Error Detecting Codes for Detecting Fault Injections in Multilevel Memories\", <em>TRUDEVICE workshop<\/em>, Barcelona, Nov. 2016<\/li>\n<li>S. Engelberg and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/upcommons.upc.edu\/bitstream\/handle\/2117\/99406\/FCTRU_2016_50_Trustworthy_Communications.pdf?sequence=1&amp;isAllowed=y\">Trustworthy Communications across Parallel Asynchronous Channels with Glitches<\/a>\", <em>TRUDEVICE workshop<\/em>, Barcelona, Nov. 2016<\/li>\n<li>Y. Neumeier and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7806122\">Robust Error Detecting Codes for Multilevel Memories<\/a>\", <em>International conference on the science of electrical engineering (ICSEE)<\/em> ,Nov. \u00a02016<\/li>\n<li>I. Levi, A. Fish and <strong>O. Keren<\/strong>, \"Security Aware Pseudo-Asynchronous Circuit Design Style\", <em>2nd International Verification and Security Workshop (IVSW)<\/em>, Thessaloniki Greece, July 2017<\/li>\n<li>D. Zooker , I. Levi, A. Fish and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8309254\">Secured Dual-Rail-Precharge Mux-Based (DPMUX) Symmetric-Logic for Low Voltage Applications<\/a>\", <em>the 2017 IEEE S3S Conference<\/em>, October 2017<\/li>\n<li>H. Rabii, Y. Neumeier and <strong>O. Keren<\/strong>, \"Compact Protection Codes\", <em>ISVW 2018<\/em>, Costa-Brava, July 2018<\/li>\n<li>M. Gay, B. Karp, <strong>O. Keren<\/strong> and I. Polian, \" On Security Metrics for Evaluating Fault-injection Countermeasures\", <em>TRUDEVICE<\/em>, March 2018<\/li>\n<li>I. Levi, Y. Rudin, A. Fish, and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8342042\">Embedded Randomness and Data Dependencies Design Paradigm: Advantages and Challenges<\/a>\", <em>DATE 2018<\/em>, pp. 395-400, Dresden, Germany, March 2018 (Invited talk)<\/li>\n<li>G. Di Natale and <strong>O. Keren<\/strong>, \"Nonlinear Codes for Control Flow Checking\", <em>TRUDEVICE<\/em>, March 2018<\/li>\n<li>M. Avital, A. Mordakhay, D. Zooker , Y. Weizman, A. Fish and <strong>O. Keren<\/strong>, \"<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8605708\">Utilization of Process and Supply Voltage Random Variations for Random Bit Generation<\/a>\", <em>the IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2018)<\/em>, China, 2018<\/li>\n<\/ul>\n<h4 style=\"text-align: justify\"><strong>Thesis Publications<\/strong><\/h4>\n<ul>\n<li style=\"text-align: justify\">Doctoral thesis: \"Algebraic coding for computer systems\".<\/li>\n<li style=\"text-align: justify\">Master's thesis: \"The capacity of TD-QAGC under minimum maximum and average power constraints\".<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>Journal Papers O. Keren and S. Litsyn, &#8220;A class of array codes correcting multiple column erasures,&#8221; IEEE Trans. on Information Theory, vol. 43, No. 6, pp. 1843-1851,1997 O. Keren and S. Litsyn, &#8220;Codes correcting phased burst errors,&#8221; IEEE Trans. On Information Theory, vol. 44, no. 1, pp. 416-420, 1998 O. Keren and S. Litsyn, &#8220;The &hellip; <a href=\"https:\/\/www.eng.biu.ac.il\/kereno\/publications\/\" class=\"more-link\">Continue reading <span class=\"screen-reader-text\">Publications<\/span> <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-23","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/pages\/23"}],"collection":[{"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/comments?post=23"}],"version-history":[{"count":294,"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/pages\/23\/revisions"}],"predecessor-version":[{"id":517,"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/pages\/23\/revisions\/517"}],"wp:attachment":[{"href":"https:\/\/www.eng.biu.ac.il\/kereno\/wp-json\/wp\/v2\/media?parent=23"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}