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<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\nCadence University Program Member<\/h3>\n\n\n\n\nThe aim of the Cadence\u00ae<\/sup>\u00a0Academic Network is to promote the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. This knowledge network among selected universities, research institutes, industry advisers, and Cadence was established in 2007 to facilitate\u00a0the sharing of technology expertise in the areas of verification, design, and implementation of microelectronic systems. We work individually with academic institutions based on their requirements and their profile.<\/p>\nThe Cadence Academic Network consists of the following categories:<\/p>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n
\n\n\n- Academic Partnerships<\/a>\u00a0\u2013 Fostering collaboration between academia and industry<\/li>\n
- University Software Program<\/a>\u00a0\u2013 Providing educational institutes easy access to Cadence technology and enabling them to make sophisticated use of these technologies<\/li>\n
- University Recruiting<\/a>\u00a0\u2013 From internships to co-operative education to job opportunities, Cadence offers post-college graduates the opportunity to be part of a winning team that\u2019s transforming the electronic design automation (EDA) industry.<\/li>\n<\/ul>\n<\/div>\n<\/div>\n
Information can also be found on the\u00a0Cadence Academic\u00a0 \u00a0Network<\/a>\u00a0web page.<\/p>\nMicrochips \u2013 the future is here<\/strong><\/em><\/h2>\nThe SoC lab, operating under the auspices of the EnICS Impact Center<\/span> at Bar-Ilan\u2019s Faculty of Engineering, spearheading chip design research in Israel.<\/strong><\/p>\nAn Israeli consortium called HiPer (High Performance System-on-Chip Design) was jointly established with Israeli chip companies and academic groups focusing on chip design research. Spearheading this venture is the Emerging Nanoscaled Integrated Circuits & Systems (EnICS) Impact Center <\/a><\/span><\/strong>at BIU, comprising of four BIU researchers \u2013 Prof. Alex Fish<\/a>, Prof. Yossi Shor<\/a>, Dr. Osnat Keren<\/a>, and Dr. Teman<\/span><\/a>. The objective of HiPer is to develop better chips, in terms of energy-efficiency, performance, cost, security, etc. The consortium established a lab for developing systems-on-chip (SoC Lab), within the EnICS Impact Center. \u201cWe decided to establish an Israeli VLSI expertise center<\/a>, in order to bridge the gap between innovation and product, connecting the point of idea to the point of realization,\u201d explains Dr. Teman. \u201cWe aim to facilitate a smooth transition from academia and industry, and become a platform for chip-related innovation, which can be translated into industrial applications. This is the great advantage of academic research: we are not dictated to by the market, and are able to study and develop innovative solutions without risking investors\u2019 interests.\u201d<\/p>\nIn 2016, three years after the HiPer consortium was launched, the SoC Lab completed its first chip. \u201cIt was a highly advanced chip, designed in 28 nanometer technology. After undergoing comprehensive post-silicon testing, the chip has been proven to tick every required box. This project proved that we can produce one compound industrial chip, at a much lesser cost than the $50m the industry would have had to pay,\u201d recalls Teman. \u201cFollowing this successful pilot, the HiPer consortium was granted a second term (5-years total), and we are now developing a second chip, incorporating innovative developments courtesy of EnICS Labs. This new chip is produced using a highly advanced technology: 16 nanometers FinFET.\u201d\u00a0Following these developments, a proposal was submitted for the establishment of a new consortium, titled GenPro, which will focus on developing a Made-in-Israel processor. Last April, the consortium was approved by the Israel Innovation Authority, and will be launched in September 2018. BIU\u2019s SoC Lab will be used as the consortium\u2019s activity hub, leading the innovative development and integration work.<\/p>\n
Thanks to the Cadence Academic Network<\/strong>, our labs have been able to develop this advance technology by using in our research the following Cadence tools:<\/p>\n
<\/a><\/h2>\n<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\nCadence University Program Member<\/h3>\n\n\n\n\nThe aim of the Cadence\u00ae<\/sup>\u00a0Academic Network is to promote the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. This knowledge network among selected universities, research institutes, industry advisers, and Cadence was established in 2007 to facilitate\u00a0the sharing of technology expertise in the areas of verification, design, and implementation of microelectronic systems. We work individually with academic institutions based on their requirements and their profile.<\/p>\nThe Cadence Academic Network consists of the following categories:<\/p>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n
\n\n\n- Academic Partnerships<\/a>\u00a0\u2013 Fostering collaboration between academia and industry<\/li>\n
- University Software Program<\/a>\u00a0\u2013 Providing educational institutes easy access to Cadence technology and enabling them to make sophisticated use of these technologies<\/li>\n
- University Recruiting<\/a>\u00a0\u2013 From internships to co-operative education to job opportunities, Cadence offers post-college graduates the opportunity to be part of a winning team that\u2019s transforming the electronic design automation (EDA) industry.<\/li>\n<\/ul>\n<\/div>\n<\/div>\n
Information can also be found on the\u00a0Cadence Academic\u00a0 \u00a0Network<\/a>\u00a0web page.<\/p>\nMicrochips \u2013 the future is here<\/strong><\/em><\/h2>\nThe SoC lab, operating under the auspices of the EnICS Impact Center<\/span> at Bar-Ilan\u2019s Faculty of Engineering, spearheading chip design research in Israel.<\/strong><\/p>\nAn Israeli consortium called HiPer (High Performance System-on-Chip Design) was jointly established with Israeli chip companies and academic groups focusing on chip design research. Spearheading this venture is the Emerging Nanoscaled Integrated Circuits & Systems (EnICS) Impact Center <\/a><\/span><\/strong>at BIU, comprising of four BIU researchers \u2013 Prof. Alex Fish<\/a>, Prof. Yossi Shor<\/a>, Dr. Osnat Keren<\/a>, and Dr. Teman<\/span><\/a>. The objective of HiPer is to develop better chips, in terms of energy-efficiency, performance, cost, security, etc. The consortium established a lab for developing systems-on-chip (SoC Lab), within the EnICS Impact Center. \u201cWe decided to establish an Israeli VLSI expertise center<\/a>, in order to bridge the gap between innovation and product, connecting the point of idea to the point of realization,\u201d explains Dr. Teman. \u201cWe aim to facilitate a smooth transition from academia and industry, and become a platform for chip-related innovation, which can be translated into industrial applications. This is the great advantage of academic research: we are not dictated to by the market, and are able to study and develop innovative solutions without risking investors\u2019 interests.\u201d<\/p>\nIn 2016, three years after the HiPer consortium was launched, the SoC Lab completed its first chip. \u201cIt was a highly advanced chip, designed in 28 nanometer technology. After undergoing comprehensive post-silicon testing, the chip has been proven to tick every required box. This project proved that we can produce one compound industrial chip, at a much lesser cost than the $50m the industry would have had to pay,\u201d recalls Teman. \u201cFollowing this successful pilot, the HiPer consortium was granted a second term (5-years total), and we are now developing a second chip, incorporating innovative developments courtesy of EnICS Labs. This new chip is produced using a highly advanced technology: 16 nanometers FinFET.\u201d\u00a0Following these developments, a proposal was submitted for the establishment of a new consortium, titled GenPro, which will focus on developing a Made-in-Israel processor. Last April, the consortium was approved by the Israel Innovation Authority, and will be launched in September 2018. BIU\u2019s SoC Lab will be used as the consortium\u2019s activity hub, leading the innovative development and integration work.<\/p>\n
Thanks to the Cadence Academic Network<\/strong>, our labs have been able to develop this advance technology by using in our research the following Cadence tools:<\/p>\n
<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\nCadence University Program Member<\/h3>\n\n\n\n\nThe aim of the Cadence\u00ae<\/sup>\u00a0Academic Network is to promote the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. This knowledge network among selected universities, research institutes, industry advisers, and Cadence was established in 2007 to facilitate\u00a0the sharing of technology expertise in the areas of verification, design, and implementation of microelectronic systems. We work individually with academic institutions based on their requirements and their profile.<\/p>\nThe Cadence Academic Network consists of the following categories:<\/p>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n
\n\n\n- Academic Partnerships<\/a>\u00a0\u2013 Fostering collaboration between academia and industry<\/li>\n
- University Software Program<\/a>\u00a0\u2013 Providing educational institutes easy access to Cadence technology and enabling them to make sophisticated use of these technologies<\/li>\n
- University Recruiting<\/a>\u00a0\u2013 From internships to co-operative education to job opportunities, Cadence offers post-college graduates the opportunity to be part of a winning team that\u2019s transforming the electronic design automation (EDA) industry.<\/li>\n<\/ul>\n<\/div>\n<\/div>\n
Information can also be found on the\u00a0Cadence Academic\u00a0 \u00a0Network<\/a>\u00a0web page.<\/p>\nMicrochips \u2013 the future is here<\/strong><\/em><\/h2>\nThe SoC lab, operating under the auspices of the EnICS Impact Center<\/span> at Bar-Ilan\u2019s Faculty of Engineering, spearheading chip design research in Israel.<\/strong><\/p>\nAn Israeli consortium called HiPer (High Performance System-on-Chip Design) was jointly established with Israeli chip companies and academic groups focusing on chip design research. Spearheading this venture is the Emerging Nanoscaled Integrated Circuits & Systems (EnICS) Impact Center <\/a><\/span><\/strong>at BIU, comprising of four BIU researchers \u2013 Prof. Alex Fish<\/a>, Prof. Yossi Shor<\/a>, Dr. Osnat Keren<\/a>, and Dr. Teman<\/span><\/a>. The objective of HiPer is to develop better chips, in terms of energy-efficiency, performance, cost, security, etc. The consortium established a lab for developing systems-on-chip (SoC Lab), within the EnICS Impact Center. \u201cWe decided to establish an Israeli VLSI expertise center<\/a>, in order to bridge the gap between innovation and product, connecting the point of idea to the point of realization,\u201d explains Dr. Teman. \u201cWe aim to facilitate a smooth transition from academia and industry, and become a platform for chip-related innovation, which can be translated into industrial applications. This is the great advantage of academic research: we are not dictated to by the market, and are able to study and develop innovative solutions without risking investors\u2019 interests.\u201d<\/p>\nIn 2016, three years after the HiPer consortium was launched, the SoC Lab completed its first chip. \u201cIt was a highly advanced chip, designed in 28 nanometer technology. After undergoing comprehensive post-silicon testing, the chip has been proven to tick every required box. This project proved that we can produce one compound industrial chip, at a much lesser cost than the $50m the industry would have had to pay,\u201d recalls Teman. \u201cFollowing this successful pilot, the HiPer consortium was granted a second term (5-years total), and we are now developing a second chip, incorporating innovative developments courtesy of EnICS Labs. This new chip is produced using a highly advanced technology: 16 nanometers FinFET.\u201d\u00a0Following these developments, a proposal was submitted for the establishment of a new consortium, titled GenPro, which will focus on developing a Made-in-Israel processor. Last April, the consortium was approved by the Israel Innovation Authority, and will be launched in September 2018. BIU\u2019s SoC Lab will be used as the consortium\u2019s activity hub, leading the innovative development and integration work.<\/p>\n
Thanks to the Cadence Academic Network<\/strong>, our labs have been able to develop this advance technology by using in our research the following Cadence tools:<\/p>\n
The aim of the Cadence\u00ae<\/sup>\u00a0Academic Network is to promote the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. This knowledge network among selected universities, research institutes, industry advisers, and Cadence was established in 2007 to facilitate\u00a0the sharing of technology expertise in the areas of verification, design, and implementation of microelectronic systems. We work individually with academic institutions based on their requirements and their profile.<\/p>\n The Cadence Academic Network consists of the following categories:<\/p>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n Information can also be found on the\u00a0Cadence Academic\u00a0 \u00a0Network<\/a>\u00a0web page.<\/p>\n The SoC lab, operating under the auspices of the EnICS Impact Center<\/span> at Bar-Ilan\u2019s Faculty of Engineering, spearheading chip design research in Israel.<\/strong><\/p>\n An Israeli consortium called HiPer (High Performance System-on-Chip Design) was jointly established with Israeli chip companies and academic groups focusing on chip design research. Spearheading this venture is the Emerging Nanoscaled Integrated Circuits & Systems (EnICS) Impact Center <\/a><\/span><\/strong>at BIU, comprising of four BIU researchers \u2013 Prof. Alex Fish<\/a>, Prof. Yossi Shor<\/a>, Dr. Osnat Keren<\/a>, and Dr. Teman<\/span><\/a>. The objective of HiPer is to develop better chips, in terms of energy-efficiency, performance, cost, security, etc. The consortium established a lab for developing systems-on-chip (SoC Lab), within the EnICS Impact Center. \u201cWe decided to establish an Israeli VLSI expertise center<\/a>, in order to bridge the gap between innovation and product, connecting the point of idea to the point of realization,\u201d explains Dr. Teman. \u201cWe aim to facilitate a smooth transition from academia and industry, and become a platform for chip-related innovation, which can be translated into industrial applications. This is the great advantage of academic research: we are not dictated to by the market, and are able to study and develop innovative solutions without risking investors\u2019 interests.\u201d<\/p>\n In 2016, three years after the HiPer consortium was launched, the SoC Lab completed its first chip. \u201cIt was a highly advanced chip, designed in 28 nanometer technology. After undergoing comprehensive post-silicon testing, the chip has been proven to tick every required box. This project proved that we can produce one compound industrial chip, at a much lesser cost than the $50m the industry would have had to pay,\u201d recalls Teman. \u201cFollowing this successful pilot, the HiPer consortium was granted a second term (5-years total), and we are now developing a second chip, incorporating innovative developments courtesy of EnICS Labs. This new chip is produced using a highly advanced technology: 16 nanometers FinFET.\u201d\u00a0Following these developments, a proposal was submitted for the establishment of a new consortium, titled GenPro, which will focus on developing a Made-in-Israel processor. Last April, the consortium was approved by the Israel Innovation Authority, and will be launched in September 2018. BIU\u2019s SoC Lab will be used as the consortium\u2019s activity hub, leading the innovative development and integration work.<\/p>\n Thanks to the Cadence Academic Network<\/strong>, our labs have been able to develop this advance technology by using in our research the following Cadence tools:<\/p>\n\n
Microchips \u2013 the future is here<\/strong><\/em><\/h2>\n
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