Journals

2017-2020

  1. I. Stanger, N. Shavit, R. Taco, M. Lanuzza and A. Fish, "Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths" in IEEE Transactions on Circuits and Systems II (TCAS-II), 2020
  2. D. Zooker, O. Ohev Shalom, Y. Weizman, A. Fish and O. Keren, "Toward Secured FPGA: Silicon Proven CLB with Reduced Information Leakage", in IEEE Solid-State Circuits Letters, 2020
  3. R. Giterman, A. Shalom, A. Burg, A. Fish, A. Teman - "A 1 Mbit Fully Logic-Compatible 3T Gain-Cell Embedded DRAM in 16nm FinFET", in IEEE Solid-State Circuits Letters, 2020
  4. A. Haran, E. Keren, D. David, N. Refaeli, R. Giterman, M. Assaf, L. Atias, A. Teman and A. Fish, "Single Event Upset Tolerance Study of a Low Voltage 13T Radiation-Hardened SRAM Bitcell," in IEEE Transactions on Nuclear Science, pp. 1-12, 2020
  5. D. Zooker, M. Avital, Y. Weizman, A. Fish and O. Keren, “Silicon Proven 1.8μm X 9.2μm 65- nm Digital Bit Generator for Hardware Security Applications," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 10, pp. 1713-1717, Oct. 2019.
  6. R. Taco, I. Levi, M. Lanuzza and A. Fish,  "An 88-fJ/40-MHz [0.4 V]–0.61-pJ/1-GHz [0.9 V] Dual-Mode Logic 8 $\times$ 8 bit Multiplier Accumulator With a Self-Adjustment Mechanism in 28-nm FD-SOI," in IEEE Journal of Solid-State Circuits, vol. 54, no. 2, pp. 560-568, Feb. 2019.
  7. R. Giterman, O. Keren and A. Fish. “A 7T Security Oriented SRAM Bitcell”. IEEE Transactions on Circuits and Systems II: Express Briefs. 1-1, 2018
  8. R. Giterman, A. Fish, A. Burg and A. Teman, “A 4-transistor nMOS-only logic-compatible gain-cell embedded DRAM with over 1.6-ms retention time at 700 mV in 28-nm FD-SOI”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, pp. 1245-1256, April 2018.
  9. R. Giterman, A. Fish, N. Geuli, E. Mentovich, A. Burg and A. Teman, “An 800-MHz Mixed-VT 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications”, IEEE Journal of Solid-State Circuits, vol. 53, issue 7, pp. 2136-2148, July 2018.
  10. R. Giterman, M. Vicentowski, I. Levi, Y. Weizman, O. Keren and A. Fish, “Leakage Power Attack-Resilient Symmetrical 8T SRAM CellIEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, issue 10, pp. 2180-2184, October 2018.
  11. U. Zangi, N. Feldman, T. Hadas, N. Dayag, J. Shor and A. Fish, “0.45 v and 18 μA/MHz MCU SOC with Advanced Adaptive Dynamic Voltage Control (ADVC)”, Journal of Low Power Electronics and Applications, vol. 8, issue 2, 2018.
  12. I. Levi, A. Fish and O. Keren. ”CPA secured data-dependent delay-assignment methodology”. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (2), 608-620, 2017.
  13. I. Levi, N. Miller, E. Avni, O. Keren and A. Fish, "A Survey of the Sensitivities of Security Oriented Flip-Flop Circuits”, IEEE Access, vol. 5, pp. 24797 - 24809, November 2017.
  14. I. Levi, A. Fish and O. Keren,  "Low Cost Pseudoasynchronous Circuit Design Style with Reduced Exploitable Side-Information", IEEE Transactions on VLSI systems, vol. 99, pp. 1-14, October 2017.
  15. R. Giterman, A. Fish, A. Burg and A. Teman, “A 4-Transistor NMOS-only Logic-Compatible Gain-Cell Embedded DRAM with over 1.6ms Retention Time at 700mV in 28nm FD-SOI”, IEEE Transactions on circuits and systems – I, vol. 99, pp. 1-14, October 2017.
  16. A. Mordakhay, Y. Telepinsky, L. Klein, J. Shor and A. Fish, A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory", IEEE Transactions on circuits and systems – I, vol. 99, pp. 1-14, September 2017.
  17. A. Kazimirsky, A. Teman and A. Fish, A 0.65V 500MHz Integrated Dynamic and Static RAM (iD-SRAM) for Error Tolerant Applications,” IEEE Transactions on VLSI systems, vol. 25, issue 9, pp. 2411 - 2418, 2017.

2015-2016

  1. E. Tadmor, D. Cohen, G. Yahav, G. Tennenholtz, G. Lehana, A. Lahav, A. Birman, A. Fenigstein and A. Fish, "Development of a ToF Pixel with VOD Shutter Mechanism, High IR QE, 4 Storages & CDS", IEEE Transactions on Electron Devices, vol. 63, issue 7, pp. 2892-2899, July 2016.
  2. L. Moyal, I. Levi, A. Teman and A. Fish, “Synthesis of Dual Mode Logic", Integration, the VLSI Journal, Elsevier, vol 55, pp. 246–253, September 2016.
  3. M. Avital, I. Levi, O. Keren and A. Fish, "CMOS based Gates for Blurring Power Information", IEEE Transactions on circuits and systems – I, vol. 63, issue 7, pp. 1033-1042, July 2016.
  4. L. Atias, A. Teman, R. Giterman, P. Meinerzhagen and A. Fish, "A Low-Voltage Radiation-Hardened 13T SRAM bitcell for Ultra-Low Power Space Applications", IEEE Transactions on VLSI systems, vol. 24, issue 8, pp. 2622-2633, February 2016.
  5. V. Yuzhaninov, I. Levi, and A. Fish, "Design Flow and Characterization Methodology for Dual Mode Logic", IEEE Access, vol. 3, pp. 3089-3101, January 2016.
  6. N. Edri, P. Meinerzhagen, A. Teman, A. Burg, and A. Fish, "Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAM", IEEE Transactions on circuits and systems – I, vol. 63, issue 2, pp. 222-232, February 2016.
  7. R. Taco, I. Levi, M. Lanuzza and A. Fish, "Low Voltage Logic Circuits Exploiting Gate Level Dynamic Body Biasing in 28 nm UTBB FD-SOI", Solid State Electronics Journal, Elsevier, vol. 117, pp. 185-192, March 2016.
  8. E. Tadmor, A. Lahav, G. Yahav, A. Fish and D. Cohen, “A Fast-Gated CMOS Image Sensor With a Vertical Overflow Drain Shutter Mechanism”, IEEE Transactions on Electron Devices, vol. 15, issue 7, pp. 3967-3972, July 2015.
  9. I. Levi, O. Keren and A. Fish, "Data-Dependent Delays as a Barrier Against Power Attacks", IEEE Transactions on circuits and systems – I, vol. 62, issue 8, pp. 2069-2078, August 2015.
  10. O. Chertkow, A. Pescovsky, L. Atias and A. Fish, "A Novel Low Power Bitcell Design Featuring Inherent SEU Prevention and Self Correction Capabilities", Journal of Low Power Electronics and Applications, vol. 5, issue 2,  pp. 130-150, June 2015.
  11. O. Bass, A. Fish and D. Naveh, “A Memristor as Multi-Bit Memory Feasibility Analysis”, special issue on memristors, Journal of Radioengineering, vol. 24, issue 2, pp. 425-430, June 2015.
  12. E. Tadmor, A. Nevet, G. Yahav, A. Fish and D. Cohen, “Dynamic Multispectral Imaging Using the Vertical Overflow Drain Structure", IEEE Sensors, vol. 15, issue 7, pp. 3967-3972, July 2015.
  13. M. Avital, H. Dagan, O. Keren and A. Fish, “Randomized Multi Topology Logic (RMTL) against Differential Power Analysis”, IEEE Transactions on VLSI systems, vol. 23, issue 4, pp. 702-711, April 2015.
  14. R. Giterman, A. Teman, P. Meinerzhagen, L. Atias, A. Burg, and A. Fish, “Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications”, IEEE Transactions on VLSI systems, vol. 24, issue 1, pp. 358-362, February 2015.
  15. M. Avital, H. Dagan, I. Levi, O. Keren and A. Fish, “DPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-PowerPassiveRFIDTagsEmployingS-Boxes”, IEEE Transactions on circuits and systems – I, vol. 62, issue 1, pp. 149-156, January 2015.

2013-2014

  1. H. Dagan, A. Shapira, A. Teman, A. Mordakhay, S. Jameson, E. Pikhay, V. Dayan, Y. Roizin, E. Socher and A. Fish, “A Low-Power Low-Cost 24 GHz RFID Tag With a C-Flash Based Embedded Memory”, IEEE Journal of Solid State Circuits, vol. 49, issue 9, pp. 1942-1957, September 2014.
  2. I. Levi, A. Albeck, A. Fish and S. Wimer, “A Low Energy and High Performance DM2 Adder”, IEEE Transactions on circuits and systems – I, vol. 61, issue 11, pp. 3175-3183, November 2014.
  3. A. Teman, P. Meinerzhagen, R. Giterman, A. Fish and A. Burg, “Replica Technique for Adaptive Refresh Timing of Gain Cell embedded DRAM", IEEE Transactions on Circuits and Systems II, vol. 61, issue 4, pp. 259-263, April 2014.
  4. I. Levi, A. Belenky and A. Fish, “Logical Effort for CMOS Based Dual Mode Logic (DML) Gates", vol. 22, issue 5, pp. 1042–1053, May  2014.
  5. A. Morgenshtein, V. Yuzhaninov, A. Kovshilovsky and A. Fish, “Full-Swing Gate Diffusion Input Logic –case-study of low-power CLA Adder design”, Integration, The VLSI Journal, Elsevier, vol. 47, issue 1, pp. 62-70, January 2014.
  6. H. Dagan, A. Teman, E. Pikhay, V. Dayan, Y. Roizin and A. Fish, “A Low-Power DCVSL-Like GIDL-Free Voltage DriverforLow-CostRFIDNonvolatileMemory”, IEEE Journal of Solid State Circuits, vol. 48, issue 6, pp. 1497–1510, June 2013.
  7. P. Meinerzhagen, A. Teman, A. Fish and A. Burg, “Impact of body biasing on the retention time of gain-cell memories”, The Journal of Engineering, vol. 1, issue 1, August 2013.
  8. N. Krihely, S. Ben-Yaakov and A. Fish, “Efficiency Optimization of Step-Down Switched Capacitor Converter for SubThreshold Applications”, IEEE Transactions on VLSI systems, vol. 21, issue 12, pp. 2353–2357, December 2013.
  9. I. Levi and A. Fish, "Dual Mode Logic-Design for Energy Efficiency and High Performance", IEEE Access, vol. 1, pp. 258-265, 2013.
  10. O. Bass, A. Meiri, Z. Zalevsky and A. Fish, ”Photonic XOR with inherent loss compensation mechanism for memory cell implementation in a standard nanoscale very large-scale integrated fabrication process” , Optics Letters, vol. 38, issue 9, pp. 1473-1475, May 2013.
  11. P. Meinerzhagen, A. Teman, R. Giterman, A. Burg and A. Fish, “Exploration of Sub-VT and Near-VT 2T Gain-Cell Memories for Ultra-Low Power Applications under Technology Scaling”, Journal of Low Power Electronics and Applications, vol. 3, issue 2, pp. 54-72, June 2013.
  12. A. Teman, A. Mordakhay and A. Fish, “Functionality and Stability Analysis of a 400mV Quasi-Static RAM (QSRAM) Bitcell”, Microelectronics Journal, Elsevier, vol. 44, issue 3, pp. 236-247, March 2013.
  13. I. Levi, A. Kaizerman and A. Fish, “Low Voltage Dual Mode Logic Model Analysis and Parameter Extraction”, Microelectronics Journal, Elsevier, vol. 44, issue 6, pp. 553-560, June 2013.
  14. S. D. Roy, X. Li, Y. Shoshan, A. Fish and O. Yadid-Pecht, “Hardware Implementation of a Digital Watermarking System for Video Authentication”, IEEE Transactions on Circuits and Systems for Video Technology, vol. 23, issue 2, pp. 289-301, February 2013.
  15. A. Spivak, A. Belenky, A. Fish and O. Yadid-Pecht, “Analog Encoding Voltage—A Key to Ultra-Wide Dynamic Range and Low Power CMOS Image Sensor”, Journal of Low Power Electronics and Applications, vol. 3, issue 1, pp. 27-53, March 2013.
  16. A. Kaizerman, S. Fisher and A. Fish, “Subthreshold Dual Mode Logic“, IEEE Transactions on VLSI systems, vol. 21, issue 5, pp. 979-983, May 2013.
  17. A. Spivak, A. Belenky, A. Fish, and O. Yadid-Pecht, “Analysis of Gated CMOS Image Sensor for Spatial Filtering”, IEEE Transactions on Electron Devices, vol. 60, issue 1, pp. 305-313, January 2013.

2011-2012

  1. A. Teman, A. Mordakhay, J. Mezhibovsky and A. Fish, “A 40 nm Sub-Threshold 5T SRAM Bit Cell with Improved Read and Write Stability”, IEEE Transactions on Circuits and Systems II, vol. 59, issue 12, pp. 873-877, December 2012.
  2. A. Spivak, A. Teman, A. Belenky, O. Yadid-Pecht and A. Fish, “Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel”, Sensors, vol. 12, issue 8, pp. 10067-10085, July 2012.
  3. A. Meiri, S. Tzur, Y. Cohen, O. Bass, A. Fish and Z. Zalevsky,  “Multilayer photonic logic gate integrated into microelectronic chip”, SPIE Journal of Nano Photonics, vol. 6, issue 1, September 2012.
  4. A. Teman, O. Yadid-Pecht and A. Fish, “Leakage Reduction in Advanced Image Sensors Using an Improved AB2C Scheme”, IEEE Sensors, Vol. 12, issue 4, pp. 773-784, April 2012 (in the list of Top Accessed Articles, February 2012).
  5. O. Yadid-Pecht, A. Fish and K. Roy, “Editorial Special Issue on Low-Power Arrays”, IEEE Sensors, Vol. 12, issue 4,  pp. 717-719, April 2012.
  6. A. Teman, L. Pergament, O. Cohen and A. Fish, “A 250 mV 8 kb 40 nm Ultra-Low Power 9T Supply Feedback SRAM (SF-SRAM)”, IEEE Journal of Solid State Circuits, vol. 46, issue 11, pp. 2713–2726, November 2011.
  7. A. Teman, L. Pergament, O. Cohen and A. Fish, “A Minimum Leakage Quasi-Static RAM Bitcell”, Journal of Low Power Electronics and Applications, vol. 1, issue 1, pp. 204-218, June 2011.
  8. A. Spivak, A. Belenky, A. Fish and O. Yadid-Pecht, “A Wide-Dynamic-Range CMOS Image Sensor With Gating for Night Vision Systems”, IEEE Transactions on Circuits and Systems II, vol. 58, issue 2, pp. 85-89, February 2011 (in the list of Top Accessed Articles, March 2011).
  9. A. Spivak, A. Teman, A. Belenky, O. Yadid-Pecht and A. Fish, “Power-Performance Tradeoffs in Wide Dynamic Range Image Sensors with Multiple Reset Approach”, Journal of Low Power Electronics and Applications, vol. 1, issue 1, pp. 59-76, June 2011.

2007-2010

  1. A. Teman, O.Yadid-Pecht and A. Fish, “Large VLSI Arrays – Power and Architectural Perspectives”, International Journal Information Technologies and Knowledge (IJ ITK), vol. 4, issue 1, pp. 76-88, November 2010.
  2. A. Spivak, A. Belenky, A. Fish and O. Yadid-Pecht, “Wide-Dynamic-Range CMOS Image Sensors—Comparative Performance Analysis”, IEEE Transactions on Electron Devices, vol. 56, issue 11, pp. 2446-2461 , November 2009.
  3. A. Belenky, A. Fish, A. Spivak and O. Yadid-Pecht, “A Snapshot CMOS Image Sensor With Extended Dynamic Range”, IEEE Sensors Journal, vol. 9, issue 2, pp. 103-111, Feb 2009.
  4. X. Li, Y. Shoshan, A. Fish, G. A. Jullien and O. Yadid-Pecht, “Hardware Implementations of Video Watermarking”, International Journal on Information Technologies and Knowledge, vol. 3, issue 2, pp. 103-120, November 2009.
  5. M. Beiderman, T. Tam, A. Fish, G. A. Jullien and O. Yadid-Pecht, “A Low-Light CMOS Contact Imager With an Emission Filter for Biosensing Applications”, IEEE Transactions on Biomedical Circuits and Systems, vol. 2, issue 3, pp. 193-203, September 2008.
  6. A. Belenky, A. Fish, A. Spivak, and O. Yadid-Pecht, “Global Shutter CMOS Image Sensor With Wide Dynamic Range”, IEEE Transactions on Circuits and Systems II, vol. 54, issue 12, pp. 1032-1036, December 2007.
  7. Y. Shoshan, A. Fish, X. Li, G. A. Jullien and O. Yadid-Pecht, “VLSI Watermark Implementations and Applications”, International Journal on Information Technologies and Knowledge, vol. 2, issue 4, pp. 379-386, November 2008.
  8. E. Artemov, A. Fish and O. Yadid-Pecht, “Image sensors for Security and Medical Applications”, International Journal on Information Theory and Applications, vol. 14, issue 2, pp. 114-127, November 2007.
  9. A. Fish, L. Sudakov-Boresha and O. Yadid-Pecht, “Low-power Tracking Image Sensor based on biological models of attention”, International Journal on Information Theory and Applications, vol. 14, issue 2, pp. 103-114, November 2007.

2002-2006

  1. A. Fish, S. Hamami and O. Yadid-Pecht, “CMOS Image Sensors with Self-Power Generation Capability”, IEEE Transactions on Circuits and Systems II, vol. 53, issue 11, pp. 1210-1214, November 2006.
  2. A. Fish, A. Belenky and O. Yadid-Pecht, “Wide Dynamic Range Snapshot APS for Ultra Low-Power Applications", IEEE Transactions on Circuits and Systems II, vol. 52, issue 11, pp. 729-733, November 2005.
  3. A. Fish and O. Yadid-Pecht, “Bottleneck Problem Solution using Biological Models of Attention in high resolution tracking sensors”, International Journal on Information Theories and Applications, vol. 12, pp. 29-35, November 2005 (Young investigator award for the best paper).
  4. A. Fish, V. Milirud and O. Yadid-Pecht, “High-Speed and High-Precision Current Winner-Take-All Circuit”, IEEE Transactions on Circuits and Systems II, vol. 52, no. 3, pp. 131-135, March 2005.
  5. S. Diller, A. Fish and O. Yadid-Pecht, “Advanced output chains for CMOS image sensors based on an active column sensor approach—a detailed comparison”, Sensors & Actuators A: Physical, vol. 116, issue 2, pp. 304-311, October 2004.
  6. A. Fish, D. Akselrod and O. Yadid-Pecht, "High Precision Image Centroid Computation via an Adaptive K-Winner-Take-all Circuit in Conjunction with a Dynamic Element Matching Algorithm for Star Tracking Applications", Analog Integrated Circuits and Signal Processing journal, Vol. 39, issue 3, pp. 251-266, June 2004.
  7. A. Fish and O. Yadid Pecht, “Adaptive thresholding for visual attention and tracking systems”, Optical Engineering, vol. 43, issue 6, pp. 1278-1279, June 2004.
  8. A. Belenky, A. Fish, S. Hamami, V. Milrud and O. Yadid-Pecht, “Method for expanding the dynamic range of the readout integration circuits for uncooled microbolometer sensors”, Optical Engineering, vol. 43, issue 6, pp.1274-1275, June 2004.
  9. A. Fish, D. Turchin and O. Yadid-Pecht, ”An APS With 2-D Winner-Take-All Selection Employing Adaptive Spatial Filtering and False Alarm Reduction”, IEEE Transactions on Electron Devices, Special Issue on Image Sensors, vol. 50, issue 1, pp. 159-165, January 2003.
  10. A. Morgenshtein, A. Fish and I. A. Wagner, "Gate-Diffusion Input (GDI) – A power-efficient method for digital combinatorial circuits ", IEEE Transactions on VLSI systems, vol. 10, issue 5, pp. 566-581, October 2002.